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LiquidCrystal.cpp: [#22] Fixed the interrupt.

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RedHawk 2023-05-04 15:46:32 +03:00
parent 4532191da6
commit 6787f03f0a
1 changed files with 27 additions and 36 deletions
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63
source/shoh/src/peripherals/LiquidCrystal.cpp
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@ -7,50 +7,58 @@
#define HIGH 1 #define HIGH 1
#define MHz1 1000000 #define MHz1 1000000
/** static bool match_flag = false;
* @brief Handle interrupt from 32-bit timer 0
* @return Nothing extern "C" {
*/ /**
void TIMER32_0_IRQHandler(void) * @brief Handle interrupt from 32-bit timer 0
{ * Sets match_flag to true when the match occurs.
if (Chip_TIMER_MatchPending(LPC_TIMER32_0, 1)) { * @return Nothing
Chip_TIMER_ClearMatch(LPC_TIMER32_0, 1); */
} void TIMER32_0_IRQHandler(void)
{
if(Chip_TIMER_MatchPending(LPC_TIMER32_0, 0)) {
Chip_TIMER_ClearMatch(LPC_TIMER32_0, 0);
match_flag = true;
}
}
} }
#if 1
void delayMicroseconds(unsigned int us) void delayMicroseconds(unsigned int us)
{ {
/* Reset match flag */
match_flag = false;
/* Initialize 32-bit timer 0 clock */ /* Initialize 32-bit timer 0 clock */
Chip_TIMER_Init(LPC_TIMER32_0); Chip_TIMER_Init(LPC_TIMER32_0);
/* Timer setup for match and interrupt at TICKRATE_HZ */ /* Timer setup for match and interrupt at TICKRATE_HZ */
Chip_TIMER_Reset(LPC_TIMER32_0); Chip_TIMER_Reset(LPC_TIMER32_0);
/* Enable timer to generate interrupt when time matches */ /* Enable timer to generate interrupt when time matches */
Chip_TIMER_MatchEnableInt(LPC_TIMER32_0, 1); Chip_TIMER_MatchEnableInt(LPC_TIMER32_0, 0);
/* Setup 32-bit timer's duration (32-bit match time) */ /* Setup 32-bit timer's duration (32-bit match time) */
/* Once_per_microsecond * number_of_microseconds. */ /* Once_per_microsecond * number_of_microseconds. */
Chip_TIMER_SetMatch(LPC_TIMER32_0, 1, (Chip_Clock_GetSystemClockRate() / MHz1 * us)); Chip_TIMER_SetMatch(LPC_TIMER32_0, 0, (Chip_Clock_GetSystemClockRate() / MHz1 * us));
/* Setup timer to stop when match occurs */ /* Setup timer to stop when match occurs */
Chip_TIMER_StopOnMatchEnable(LPC_TIMER32_0, 1); Chip_TIMER_StopOnMatchEnable(LPC_TIMER32_0, 0);
/* Start timer */ /* Start timer */
Chip_TIMER_Enable(LPC_TIMER32_0); Chip_TIMER_Enable(LPC_TIMER32_0);
/* Clear timer of any pending interrupts */ /* Clear timer of any pending interrupts */
NVIC_ClearPendingIRQ(TIMER_32_0_IRQn); NVIC_ClearPendingIRQ(TIMER_32_0_IRQn);
/* Enable timer interrupt */ /* Enable timer interrupt */
NVIC_EnableIRQ(TIMER_32_0_IRQn); NVIC_EnableIRQ(TIMER_32_0_IRQn);
/* Wait for the interrupt to trigger */ /* Wait for the interrupt to trigger */
while(Chip_TIMER_MatchPending(LPC_TIMER32_0, 1)); while(!match_flag);
/*Disable the interrupt*/ /*Disable the interrupt*/
Chip_TIMER_MatchDisableInt(LPC_TIMER32_0, 1); Chip_TIMER_MatchDisableInt(LPC_TIMER32_0, 0);
/* Disable timer */ /* Disable timer */
Chip_TIMER_Disable(LPC_TIMER32_0); Chip_TIMER_Disable(LPC_TIMER32_0);
@ -58,23 +66,6 @@ void delayMicroseconds(unsigned int us)
/* Deinitialise timer. */ /* Deinitialise timer. */
Chip_TIMER_DeInit(LPC_TIMER32_0); Chip_TIMER_DeInit(LPC_TIMER32_0);
} }
#else
void delayMicroseconds(uint32_t delay)
{
static int init;
if(!init) {
// start core clock counter
CoreDebug->DEMCR |= 1 << 24;
DWT->CTRL |= 1;
init = 1;
}
uint32_t start = DWT->CYCCNT;
delay = delay * 72; // assuming 72MHz clock
while(DWT->CYCCNT - start < delay);
}
#endif
// When the display powers up, it is configured as follows: // When the display powers up, it is configured as follows:
// //
@ -98,7 +89,7 @@ void delayMicroseconds(uint32_t delay)
LiquidCrystal::LiquidCrystal(DigitalIoPin *rs, DigitalIoPin *enable, LiquidCrystal::LiquidCrystal(DigitalIoPin *rs, DigitalIoPin *enable,
DigitalIoPin *d0, DigitalIoPin *d1, DigitalIoPin *d2, DigitalIoPin *d3) DigitalIoPin *d0, DigitalIoPin *d1, DigitalIoPin *d2, DigitalIoPin *d3)
{ {
rs_pin = rs; rs_pin = rs;
enable_pin = enable; enable_pin = enable;