118 lines
3.7 KiB
C
118 lines
3.7 KiB
C
/*
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* @brief LPC15xx Power ROM API declarations and functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2013
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __ROM_PWR_15XX_H_
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#define __ROM_PWR_15XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup PWRROM_15XX CHIP: LPC15xx Power ROM API declarations and functions
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* @ingroup ROMAPI_15XX
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* @{
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*/
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/**
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* @brief LPC15XX Power ROM APIs - set_pll mode options
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*/
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#define CPU_FREQ_EQU 0
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#define CPU_FREQ_LTE 1
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#define CPU_FREQ_GTE 2
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#define CPU_FREQ_APPROX 3
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/**
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* @brief LPC15XX Power ROM APIs - set_pll response0 options
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*/
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#define PLL_CMD_SUCCESS 0
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#define PLL_INVALID_FREQ 1
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#define PLL_INVALID_MODE 2
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#define PLL_FREQ_NOT_FOUND 3
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#define PLL_NOT_LOCKED 4
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/**
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* @brief LPC15XX Power ROM APIs - set_power mode options
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*/
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#define PWR_DEFAULT 0
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#define PWR_CPU_PERFORMANCE 1
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#define PWR_EFFICIENCY 2
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#define PWR_LOW_CURRENT 3
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/**
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* @brief LPC15XX Power ROM APIs - set_power response0 options
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*/
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#define PWR_CMD_SUCCESS 0
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#define PWR_INVALID_FREQ 1
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#define PWR_INVALID_MODE 2
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/**
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* @brief LPC15XX Power ROM APIs - power_mode_configure mode options
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*/
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#define PMU_SLEEP 0
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#define PMU_DEEP_SLEEP 1
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#define PMU_POWERDOWN 2
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#define PMU_DEEP_POWERDOWN 3
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/**
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* @brief LPC15XX Power ROM APIs - power_mode_configure peripheral control bits
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*/
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#define PMU_PD_WDOSC (1 << 0)
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#define PMU_PD_BOD (1 << 1)
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#define PMU_PD_ACMP0 (1 << 2)
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#define PMU_PD_ACMP1 (1 << 3)
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#define PMU_PD_ACMP2 (1 << 4)
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#define PMU_PD_ACMP3 (1 << 5)
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#define PMU_PD_IREF (1 << 6)
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#define PMU_PD_TS (1 << 7)
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/**
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* @brief LPC15xx Power ROM API structure
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* The power profile API provides functions to configure the system clock and optimize the
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* system setting for lowest power consumption.
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*/
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typedef struct PWRD_API {
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void (*set_pll)(uint32_t cmd[], uint32_t resp[]); /*!< Set PLL function */
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void (*set_power)(uint32_t cmd[], uint32_t resp[]); /*!< Set power function */
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void (*power_mode_configure)(uint32_t power_mode, uint32_t peripheral_ctrl);/*!< Sets the chip is low power modes */
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void (*set_aclkgate)(uint32_t aclkgate);
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uint32_t (*get_aclkgate)(void);
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} PWRD_API_T;
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ROM_PWR_15XX_H_ */
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