Merge pull request #37 from vas-dav/tester

Format and cleanup
This commit is contained in:
Evgenii Meshcheriakov 2022-10-23 10:00:26 +03:00 committed by GitHub
commit a1272564f0
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9 changed files with 197 additions and 158 deletions

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@ -11,11 +11,13 @@
#include "ModbusMaster.h"
#include "ModbusRegister.h"
class GMP252 {
class GMP252
{
public:
GMP252();
int read();
virtual ~GMP252();
GMP252 ();
int read ();
virtual ~GMP252 ();
private:
ModbusMaster sens;
ModbusRegister regInt;

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@ -7,19 +7,21 @@
#include "GMP252.h"
GMP252::GMP252(): sens{240}, regInt{&sens, 0x0100}, regFloat{&sens, 0x0000}{
sens.begin(9600);
GMP252::GMP252 ()
: sens{ 240 }, regInt{ &sens, 0x0100 }, regFloat{ &sens, 0x0000 }
{
sens.begin (9600);
}
int GMP252:: read() {
int result = regInt.read();
int
GMP252::read ()
{
int result = regInt.read ();
return result;
}
GMP252::~GMP252() {
GMP252::~GMP252 ()
{
// TODO Auto-generated destructor stub
}

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@ -11,12 +11,14 @@
#include "ModbusMaster.h"
#include "ModbusRegister.h"
class HMP60 {
class HMP60
{
public:
HMP60();
int readRH();
int readT();
virtual ~HMP60();
HMP60 ();
int readRH ();
int readT ();
virtual ~HMP60 ();
private:
ModbusMaster sens;
ModbusRegister regRHint;

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@ -7,23 +7,26 @@
#include <HMP60.h>
HMP60::HMP60() : sens{241}, regRHint{&sens, 0x0100},
regTint{&sens, 0x0101}, regRHfloat{&sens, 0x0000}
HMP60::HMP60 ()
: sens{ 241 }, regRHint{ &sens, 0x0100 }, regTint{ &sens, 0x0101 },
regRHfloat{ &sens, 0x0000 }
{
sens.begin(9600);
sens.begin (9600);
}
int HMP60::readRH() {
int result = regRHint.read();
return result/10;
inline int
HMP60::readRH ()
{
return (regRHint.read ()) / 10;
}
int HMP60::readT() {
int result = regTint.read();
return result/10;
inline int
HMP60::readT ()
{
return (regTint.read ()) / 10;
}
HMP60::~HMP60() {
HMP60::~HMP60 ()
{
// TODO Auto-generated destructor stub
}

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@ -52,13 +52,16 @@ Counter::Counter (unsigned int down, unsigned int up)
void
Counter::setInit (unsigned int newInit)
{
if(newInit > up_lim){
if (newInit > up_lim)
{
init = up_lim;
}
else if(newInit < down_lim){
else if (newInit < down_lim)
{
init = down_lim;
}
else{
else
{
init = newInit;
}
}

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@ -13,7 +13,7 @@
#include <climits>
static volatile std::atomic_int timer;
static volatile unsigned int systicks = 0;
static volatile std::atomic_int systicks;
extern "C"
{
@ -24,8 +24,7 @@ extern "C"
void SysTick_Handler (void);
}
uint32_t millis();
uint32_t millis ();
class Timer
{

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@ -25,6 +25,7 @@ Timer::Timer (uint32_t freq) : freq (freq)
SysTick_Config (sysTickRate / freq);
counter = 0;
timer = 0;
systicks = 0;
}
Timer::~Timer ()
@ -65,6 +66,8 @@ Timer::resetCounter ()
counter.store (0, std::memory_order_relaxed);
}
uint32_t millis() {
uint32_t
millis ()
{
return systicks;
}

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@ -3,7 +3,8 @@
*
* Created on: 21.2.2016
* Author: krl
* Based on example provided by NXP Semiconductors. See copyright notice below.
* Based on example provided by NXP Semiconductors. See copyright notice
* below.
*/
/*
@ -21,74 +22,83 @@
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* or liability for the use of the software, conveys no license or rights under
* any patent, copyright, mask work right, or any other intellectual property
* rights in or to any products. NXP Semiconductors reserves the right to make
* changes in the software without notification. NXP Semiconductors also makes
* no representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* licensor's relevant copyrights in the software, without fee, provided that
* it is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "I2C.h"
I2C::I2C(const I2C_config &cfg): device(nullptr) {
if(cfg.device_number == 0) {
I2C::I2C (const I2C_config &cfg) : device (nullptr)
{
if (cfg.device_number == 0)
{
device = LPC_I2C0;
// board init must have been called before the pins can be configured
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_DIGMODE_EN | cfg.i2c_mode);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 23, IOCON_DIGMODE_EN | cfg.i2c_mode);
Chip_SWM_EnableFixedPin(SWM_FIXED_I2C0_SCL);
Chip_SWM_EnableFixedPin(SWM_FIXED_I2C0_SDA);
Chip_IOCON_PinMuxSet (LPC_IOCON, 0, 22, IOCON_DIGMODE_EN | cfg.i2c_mode);
Chip_IOCON_PinMuxSet (LPC_IOCON, 0, 23, IOCON_DIGMODE_EN | cfg.i2c_mode);
Chip_SWM_EnableFixedPin (SWM_FIXED_I2C0_SCL);
Chip_SWM_EnableFixedPin (SWM_FIXED_I2C0_SDA);
}
else {
else
{
// currently we support only I2C number 0
}
if(device) {
if (device)
{
/* Enable I2C clock and reset I2C peripheral - the boot ROM does not
do this */
Chip_I2C_Init(device);
Chip_I2C_Init (device);
/* Setup clock rate for I2C */
Chip_I2C_SetClockDiv(device, cfg.clock_divider);
Chip_I2C_SetClockDiv (device, cfg.clock_divider);
/* Setup I2CM transfer rate */
Chip_I2CM_SetBusSpeed(device, cfg.speed);
Chip_I2CM_SetBusSpeed (device, cfg.speed);
/* Enable Master Mode */
Chip_I2CM_Enable(device);
Chip_I2CM_Enable (device);
}
}
I2C::~I2C() {
I2C::~I2C ()
{
// TODO Auto-generated destructor stub
}
bool I2C::write(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize)
bool
I2C::write (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize)
{
return transaction(devAddr, txBuffPtr, txSize, nullptr, 0);
return transaction (devAddr, txBuffPtr, txSize, nullptr, 0);
}
bool I2C::read(uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize)
bool
I2C::read (uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize)
{
return transaction(devAddr, nullptr, 0, rxBuffPtr, rxSize);
return transaction (devAddr, nullptr, 0, rxBuffPtr, rxSize);
}
bool I2C::transaction(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize, uint8_t *rxBuffPtr, uint16_t rxSize) {
bool
I2C::transaction (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize,
uint8_t *rxBuffPtr, uint16_t rxSize)
{
I2CM_XFER_T i2cmXferRec;
// make sure that master is idle
while(!Chip_I2CM_IsMasterPending(LPC_I2C0));
while (!Chip_I2CM_IsMasterPending (LPC_I2C0))
;
/* Setup I2C transfer record */
i2cmXferRec.slaveAddr = devAddr;
@ -98,24 +108,29 @@ bool I2C::transaction(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize, uint
i2cmXferRec.txBuff = txBuffPtr;
i2cmXferRec.rxBuff = rxBuffPtr;
I2CM_XferBlocking(LPC_I2C0, &i2cmXferRec);
I2CM_XferBlocking (LPC_I2C0, &i2cmXferRec);
// Chip_I2CM_XferBlocking returns before stop condition is fully completed
// therefore we need to wait for master to be idle when doing back-to-back transactions (see beginning of the function)
// therefore we need to wait for master to be idle when doing back-to-back
// transactions (see beginning of the function)
/* Test for valid operation */
if (i2cmXferRec.status == I2CM_STATUS_OK) {
if (i2cmXferRec.status == I2CM_STATUS_OK)
{
return true;
}
else {
else
{
return false;
}
}
/* Transmit and Receive data in master mode */
/* This duplicates (and combines) the functionality of Chip_I2CM_Xfer and Chip_I2CM_XferBlocking with a modification
* that allows us to do a zero length write (needed to use honeywell humidity/temp sensor)
/* This duplicates (and combines) the functionality of Chip_I2CM_Xfer and
* Chip_I2CM_XferBlocking with a modification that allows us to do a zero
* length write (needed to use honeywell humidity/temp sensor)
*/
uint32_t I2C::I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
uint32_t
I2C::I2CM_XferBlocking (LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
{
uint32_t ret = 0;
/* start transfer */
@ -123,21 +138,25 @@ uint32_t I2C::I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
/* set the transfer status as busy */
xfer->status = I2CM_STATUS_BUSY;
/* Clear controller state. */
Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
Chip_I2CM_ClearStatus (pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
/* Write Address and RW bit to data register */
//Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0)); // original NXP version
// krl : both read and write lenght is 0 --> write (for honeywell temp sensor)
Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0 && xfer->rxSz != 0));
// Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0)); //
// original NXP version
// krl : both read and write lenght is 0 --> write (for honeywell temp
// sensor)
Chip_I2CM_WriteByte (pI2C, (xfer->slaveAddr << 1)
| (xfer->txSz == 0 && xfer->rxSz != 0));
/* Enter to Master Transmitter mode */
Chip_I2CM_SendStart(pI2C);
Chip_I2CM_SendStart (pI2C);
while (ret == 0) {
while (ret == 0)
{
/* wait for status change interrupt */
while (!Chip_I2CM_IsMasterPending(pI2C)) {}
while (!Chip_I2CM_IsMasterPending (pI2C))
{
}
/* call state change handler */
ret = Chip_I2CM_XferHandler(pI2C, xfer);
ret = Chip_I2CM_XferHandler (pI2C, xfer);
}
return ret;
}

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@ -10,24 +10,30 @@
#include "chip.h"
struct I2C_config {
struct I2C_config
{
unsigned int device_number;
unsigned int speed;
unsigned int clock_divider;
unsigned int i2c_mode;
I2C_config(): device_number(0), speed(100000), clock_divider(40), i2c_mode(IOCON_SFI2C_EN) {};
I2C_config ()
: device_number (0), speed (100000), clock_divider (40),
i2c_mode (IOCON_SFI2C_EN){};
};
class I2C {
class I2C
{
public:
I2C(const I2C_config &cfg);
virtual ~I2C();
bool transaction(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize, uint8_t *rxBuffPtr, uint16_t rxSize);
bool write(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize);
bool read(uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize);
I2C (const I2C_config &cfg);
virtual ~I2C ();
bool transaction (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize,
uint8_t *rxBuffPtr, uint16_t rxSize);
bool write (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize);
bool read (uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize);
private:
LPC_I2C_T *device;
static uint32_t I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer);
static uint32_t I2CM_XferBlocking (LPC_I2C_T *pI2C, I2CM_XFER_T *xfer);
};
#endif /* I2C_H_ */