commit
a1272564f0
@ -11,15 +11,17 @@
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#include "ModbusMaster.h"
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#include "ModbusRegister.h"
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class GMP252 {
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class GMP252
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{
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public:
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GMP252();
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int read();
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virtual ~GMP252();
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GMP252 ();
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int read ();
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virtual ~GMP252 ();
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private:
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ModbusMaster sens;
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ModbusRegister regInt;
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ModbusRegister regFloat;
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ModbusMaster sens;
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ModbusRegister regInt;
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ModbusRegister regFloat;
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};
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#endif /* GMP252_H_ */
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@ -7,19 +7,21 @@
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#include "GMP252.h"
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GMP252::GMP252(): sens{240}, regInt{&sens, 0x0100}, regFloat{&sens, 0x0000}{
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sens.begin(9600);
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GMP252::GMP252 ()
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: sens{ 240 }, regInt{ &sens, 0x0100 }, regFloat{ &sens, 0x0000 }
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{
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sens.begin (9600);
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}
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int GMP252:: read() {
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int result = regInt.read();
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return result;
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int
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GMP252::read ()
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{
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int result = regInt.read ();
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return result;
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}
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GMP252::~GMP252() {
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// TODO Auto-generated destructor stub
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GMP252::~GMP252 ()
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{
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// TODO Auto-generated destructor stub
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}
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@ -11,17 +11,19 @@
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#include "ModbusMaster.h"
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#include "ModbusRegister.h"
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class HMP60 {
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class HMP60
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{
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public:
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HMP60();
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int readRH();
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int readT();
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virtual ~HMP60();
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HMP60 ();
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int readRH ();
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int readT ();
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virtual ~HMP60 ();
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private:
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ModbusMaster sens;
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ModbusRegister regRHint;
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ModbusRegister regRHfloat;
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ModbusRegister regTint;
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ModbusMaster sens;
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ModbusRegister regRHint;
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ModbusRegister regRHfloat;
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ModbusRegister regTint;
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};
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#endif /* HMP60_H_ */
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@ -7,23 +7,26 @@
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#include <HMP60.h>
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HMP60::HMP60() : sens{241}, regRHint{&sens, 0x0100},
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regTint{&sens, 0x0101}, regRHfloat{&sens, 0x0000}
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HMP60::HMP60 ()
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: sens{ 241 }, regRHint{ &sens, 0x0100 }, regTint{ &sens, 0x0101 },
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regRHfloat{ &sens, 0x0000 }
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{
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sens.begin(9600);
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sens.begin (9600);
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}
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int HMP60::readRH() {
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int result = regRHint.read();
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return result/10;
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inline int
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HMP60::readRH ()
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{
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return (regRHint.read ()) / 10;
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}
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int HMP60::readT() {
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int result = regTint.read();
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return result/10;
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inline int
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HMP60::readT ()
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{
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return (regTint.read ()) / 10;
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}
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HMP60::~HMP60() {
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// TODO Auto-generated destructor stub
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HMP60::~HMP60 ()
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{
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// TODO Auto-generated destructor stub
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}
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@ -52,13 +52,16 @@ Counter::Counter (unsigned int down, unsigned int up)
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void
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Counter::setInit (unsigned int newInit)
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{
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if(newInit > up_lim){
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init = up_lim;
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}
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else if(newInit < down_lim){
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init = down_lim;
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}
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else{
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init = newInit;
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}
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if (newInit > up_lim)
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{
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init = up_lim;
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}
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else if (newInit < down_lim)
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{
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init = down_lim;
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}
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else
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{
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init = newInit;
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}
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}
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@ -13,7 +13,7 @@
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#include <climits>
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static volatile std::atomic_int timer;
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static volatile unsigned int systicks = 0;
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static volatile std::atomic_int systicks;
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extern "C"
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{
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@ -24,8 +24,7 @@ extern "C"
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void SysTick_Handler (void);
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}
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uint32_t millis();
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uint32_t millis ();
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class Timer
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{
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@ -12,7 +12,7 @@ extern "C"
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void
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SysTick_Handler (void)
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{
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systicks++;
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systicks++;
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if (timer > 0)
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timer--;
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}
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@ -25,6 +25,7 @@ Timer::Timer (uint32_t freq) : freq (freq)
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SysTick_Config (sysTickRate / freq);
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counter = 0;
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timer = 0;
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systicks = 0;
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}
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Timer::~Timer ()
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@ -65,6 +66,8 @@ Timer::resetCounter ()
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counter.store (0, std::memory_order_relaxed);
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}
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uint32_t millis() {
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return systicks;
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uint32_t
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millis ()
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{
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return systicks;
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}
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@ -3,7 +3,8 @@
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*
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* Created on: 21.2.2016
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* Author: krl
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* Based on example provided by NXP Semiconductors. See copyright notice below.
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* Based on example provided by NXP Semiconductors. See copyright notice
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* below.
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*/
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/*
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@ -21,123 +22,141 @@
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* or liability for the use of the software, conveys no license or rights under
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* any patent, copyright, mask work right, or any other intellectual property
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* rights in or to any products. NXP Semiconductors reserves the right to make
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* changes in the software without notification. NXP Semiconductors also makes
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* no representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* licensor's relevant copyrights in the software, without fee, provided that
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* it is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "I2C.h"
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I2C::I2C(const I2C_config &cfg): device(nullptr) {
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if(cfg.device_number == 0) {
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device = LPC_I2C0;
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// board init must have been called before the pins can be configured
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Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_DIGMODE_EN | cfg.i2c_mode);
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Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 23, IOCON_DIGMODE_EN | cfg.i2c_mode);
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Chip_SWM_EnableFixedPin(SWM_FIXED_I2C0_SCL);
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Chip_SWM_EnableFixedPin(SWM_FIXED_I2C0_SDA);
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}
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else {
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// currently we support only I2C number 0
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}
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if(device) {
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/* Enable I2C clock and reset I2C peripheral - the boot ROM does not
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do this */
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Chip_I2C_Init(device);
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/* Setup clock rate for I2C */
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Chip_I2C_SetClockDiv(device, cfg.clock_divider);
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/* Setup I2CM transfer rate */
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Chip_I2CM_SetBusSpeed(device, cfg.speed);
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/* Enable Master Mode */
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Chip_I2CM_Enable(device);
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}
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}
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I2C::~I2C() {
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// TODO Auto-generated destructor stub
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}
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bool I2C::write(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize)
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I2C::I2C (const I2C_config &cfg) : device (nullptr)
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{
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return transaction(devAddr, txBuffPtr, txSize, nullptr, 0);
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if (cfg.device_number == 0)
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{
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device = LPC_I2C0;
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// board init must have been called before the pins can be configured
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Chip_IOCON_PinMuxSet (LPC_IOCON, 0, 22, IOCON_DIGMODE_EN | cfg.i2c_mode);
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Chip_IOCON_PinMuxSet (LPC_IOCON, 0, 23, IOCON_DIGMODE_EN | cfg.i2c_mode);
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Chip_SWM_EnableFixedPin (SWM_FIXED_I2C0_SCL);
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Chip_SWM_EnableFixedPin (SWM_FIXED_I2C0_SDA);
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}
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else
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{
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// currently we support only I2C number 0
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}
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if (device)
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{
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/* Enable I2C clock and reset I2C peripheral - the boot ROM does not
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do this */
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Chip_I2C_Init (device);
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/* Setup clock rate for I2C */
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Chip_I2C_SetClockDiv (device, cfg.clock_divider);
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/* Setup I2CM transfer rate */
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Chip_I2CM_SetBusSpeed (device, cfg.speed);
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/* Enable Master Mode */
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Chip_I2CM_Enable (device);
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}
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}
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bool I2C::read(uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize)
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I2C::~I2C ()
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{
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return transaction(devAddr, nullptr, 0, rxBuffPtr, rxSize);
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// TODO Auto-generated destructor stub
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}
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bool
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I2C::write (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize)
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{
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return transaction (devAddr, txBuffPtr, txSize, nullptr, 0);
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}
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bool I2C::transaction(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize, uint8_t *rxBuffPtr, uint16_t rxSize) {
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I2CM_XFER_T i2cmXferRec;
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bool
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I2C::read (uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize)
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{
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return transaction (devAddr, nullptr, 0, rxBuffPtr, rxSize);
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}
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// make sure that master is idle
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while(!Chip_I2CM_IsMasterPending(LPC_I2C0));
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bool
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I2C::transaction (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize,
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uint8_t *rxBuffPtr, uint16_t rxSize)
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{
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I2CM_XFER_T i2cmXferRec;
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/* Setup I2C transfer record */
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i2cmXferRec.slaveAddr = devAddr;
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i2cmXferRec.status = 0;
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i2cmXferRec.txSz = txSize;
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i2cmXferRec.rxSz = rxSize;
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i2cmXferRec.txBuff = txBuffPtr;
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i2cmXferRec.rxBuff = rxBuffPtr;
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// make sure that master is idle
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while (!Chip_I2CM_IsMasterPending (LPC_I2C0))
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;
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I2CM_XferBlocking(LPC_I2C0, &i2cmXferRec);
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// Chip_I2CM_XferBlocking returns before stop condition is fully completed
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// therefore we need to wait for master to be idle when doing back-to-back transactions (see beginning of the function)
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/* Setup I2C transfer record */
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i2cmXferRec.slaveAddr = devAddr;
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i2cmXferRec.status = 0;
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i2cmXferRec.txSz = txSize;
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i2cmXferRec.rxSz = rxSize;
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i2cmXferRec.txBuff = txBuffPtr;
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i2cmXferRec.rxBuff = rxBuffPtr;
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/* Test for valid operation */
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if (i2cmXferRec.status == I2CM_STATUS_OK) {
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return true;
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}
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else {
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return false;
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}
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I2CM_XferBlocking (LPC_I2C0, &i2cmXferRec);
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// Chip_I2CM_XferBlocking returns before stop condition is fully completed
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// therefore we need to wait for master to be idle when doing back-to-back
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// transactions (see beginning of the function)
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/* Test for valid operation */
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if (i2cmXferRec.status == I2CM_STATUS_OK)
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{
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return true;
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}
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else
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{
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return false;
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}
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}
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/* Transmit and Receive data in master mode */
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/* This duplicates (and combines) the functionality of Chip_I2CM_Xfer and Chip_I2CM_XferBlocking with a modification
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* that allows us to do a zero length write (needed to use honeywell humidity/temp sensor)
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/* This duplicates (and combines) the functionality of Chip_I2CM_Xfer and
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* Chip_I2CM_XferBlocking with a modification that allows us to do a zero
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* length write (needed to use honeywell humidity/temp sensor)
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*/
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uint32_t I2C::I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
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uint32_t
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I2C::I2CM_XferBlocking (LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
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{
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uint32_t ret = 0;
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/* start transfer */
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uint32_t ret = 0;
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/* start transfer */
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/* set the transfer status as busy */
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xfer->status = I2CM_STATUS_BUSY;
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/* Clear controller state. */
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Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
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/* Write Address and RW bit to data register */
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//Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0)); // original NXP version
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// krl : both read and write lenght is 0 --> write (for honeywell temp sensor)
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Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0 && xfer->rxSz != 0));
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/* Enter to Master Transmitter mode */
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Chip_I2CM_SendStart(pI2C);
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/* set the transfer status as busy */
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xfer->status = I2CM_STATUS_BUSY;
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/* Clear controller state. */
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Chip_I2CM_ClearStatus (pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
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/* Write Address and RW bit to data register */
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// Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0)); //
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// original NXP version
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// krl : both read and write lenght is 0 --> write (for honeywell temp
|
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// sensor)
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Chip_I2CM_WriteByte (pI2C, (xfer->slaveAddr << 1)
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| (xfer->txSz == 0 && xfer->rxSz != 0));
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/* Enter to Master Transmitter mode */
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Chip_I2CM_SendStart (pI2C);
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while (ret == 0) {
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/* wait for status change interrupt */
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while (!Chip_I2CM_IsMasterPending(pI2C)) {}
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/* call state change handler */
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ret = Chip_I2CM_XferHandler(pI2C, xfer);
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}
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return ret;
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while (ret == 0)
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{
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/* wait for status change interrupt */
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while (!Chip_I2CM_IsMasterPending (pI2C))
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{
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}
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/* call state change handler */
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ret = Chip_I2CM_XferHandler (pI2C, xfer);
|
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}
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return ret;
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}
|
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||||
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@ -10,24 +10,30 @@
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#include "chip.h"
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struct I2C_config {
|
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unsigned int device_number;
|
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unsigned int speed;
|
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unsigned int clock_divider;
|
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unsigned int i2c_mode;
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I2C_config(): device_number(0), speed(100000), clock_divider(40), i2c_mode(IOCON_SFI2C_EN) {};
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struct I2C_config
|
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{
|
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unsigned int device_number;
|
||||
unsigned int speed;
|
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unsigned int clock_divider;
|
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unsigned int i2c_mode;
|
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I2C_config ()
|
||||
: device_number (0), speed (100000), clock_divider (40),
|
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i2c_mode (IOCON_SFI2C_EN){};
|
||||
};
|
||||
|
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class I2C {
|
||||
class I2C
|
||||
{
|
||||
public:
|
||||
I2C(const I2C_config &cfg);
|
||||
virtual ~I2C();
|
||||
bool transaction(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize, uint8_t *rxBuffPtr, uint16_t rxSize);
|
||||
bool write(uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize);
|
||||
bool read(uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize);
|
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I2C (const I2C_config &cfg);
|
||||
virtual ~I2C ();
|
||||
bool transaction (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize,
|
||||
uint8_t *rxBuffPtr, uint16_t rxSize);
|
||||
bool write (uint8_t devAddr, uint8_t *txBuffPtr, uint16_t txSize);
|
||||
bool read (uint8_t devAddr, uint8_t *rxBuffPtr, uint16_t rxSize);
|
||||
|
||||
private:
|
||||
LPC_I2C_T *device;
|
||||
static uint32_t I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer);
|
||||
LPC_I2C_T *device;
|
||||
static uint32_t I2CM_XferBlocking (LPC_I2C_T *pI2C, I2CM_XFER_T *xfer);
|
||||
};
|
||||
|
||||
#endif /* I2C_H_ */
|
||||
|
||||
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Reference in New Issue
Block a user