root: init project
Adding basic board repos, main
This commit is contained in:
146
lpc_chip_15xx/src/acmp_15xx.c
Normal file
146
lpc_chip_15xx/src/acmp_15xx.c
Normal file
@@ -0,0 +1,146 @@
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/*
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* @brief LPC15xx Analog comparator driver
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*
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* Copyright(C) NXP Semiconductors, 2014
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* All rights reserved.
|
||||
*
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||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
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#include "chip.h"
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/*****************************************************************************
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||||
* Private types/enumerations/variables
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||||
****************************************************************************/
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||||
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||||
/*****************************************************************************
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||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
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||||
* Private functions
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||||
****************************************************************************/
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||||
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||||
/*****************************************************************************
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||||
* Public functions
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****************************************************************************/
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/* Initializes the ACMP */
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void Chip_ACMP_Init(LPC_CMP_T *pACMP)
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{
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Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ACMP0_PD | SYSCTL_POWERDOWN_ACMP1_PD |
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SYSCTL_POWERDOWN_ACMP2_PD | SYSCTL_POWERDOWN_ACMP3_PD);
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Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ACMP);
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Chip_SYSCTL_PeriphReset(RESET_ACMP);
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}
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/* De-initializes the ACMP */
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void Chip_ACMP_Deinit(LPC_CMP_T *pACMP)
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{
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Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_ACMP);
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Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_ACMP0_PD | SYSCTL_POWERDOWN_ACMP1_PD |
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SYSCTL_POWERDOWN_ACMP2_PD | SYSCTL_POWERDOWN_ACMP3_PD);
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}
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/*Sets up ACMP edge selection */
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void Chip_ACMP_SetIntEdgeSelection(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_EDGESEL_T edgeSel)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_INTEDGE_MASK;
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pACMP->ACMP[index].CMP = reg | (uint32_t) edgeSel;
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}
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/*Selects positive voltage input */
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void Chip_ACMP_SetPosVoltRef(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_POS_INPUT_T Posinput)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_COMPVPSEL_MASK;
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/* Select positive input */
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pACMP->ACMP[index].CMP = reg | (uint32_t) Posinput;
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}
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/*Selects negative voltage input */
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void Chip_ACMP_SetNegVoltRef(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_NEG_INPUT_T Neginput)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_COMPVMSEL_MASK;
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/* Select negative input */
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pACMP->ACMP[index].CMP = reg | (uint32_t) Neginput;
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}
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/*Selects hysteresis level */
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void Chip_ACMP_SetHysteresis(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_HYS_T hys)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_HYSTERESIS_MASK;
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pACMP->ACMP[index].CMP = reg | (uint32_t) hys;
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}
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/*Helper function for setting up ACMP voltage settings */
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void Chip_ACMP_SetupACMPRefs(LPC_CMP_T *pACMP, uint8_t index, CHIP_ACMP_POS_INPUT_T Posinput,
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CHIP_ACMP_NEG_INPUT_T Neginput, CHIP_ACMP_HYS_T hys)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_HYSTERESIS_MASK |
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ACMP_COMPVMSEL_MASK | ACMP_COMPVPSEL_MASK);
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pACMP->ACMP[index].CMP = reg | (uint32_t) Posinput | (uint32_t) Neginput | (uint32_t) hys;
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}
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/*Helper function for setting up ACMP interrupt settings */
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void Chip_ACMP_SetupACMPInt(LPC_CMP_T *pACMP, uint8_t index, bool level,
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bool invert, CHIP_ACMP_EDGESEL_T edgeSel)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_INTPOL_BIT |
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ACMP_INTTYPE_BIT | ACMP_INTEDGE_MASK);
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/* For Level triggered interrupt, invert sets the polarity
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For edge triggered interrupt edgeSel sets the edge type */
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if (level) {
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reg |= ACMP_INTTYPE_BIT;
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if (invert) {
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reg |= ACMP_INTPOL_BIT;
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}
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}
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else {
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reg |= (uint32_t) edgeSel;
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}
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pACMP->ACMP[index].CMP = reg;
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}
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/*Sets up voltage ladder */
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void Chip_ACMP_SetupVoltLadder(LPC_CMP_T *pACMP, uint8_t index, uint32_t ladsel, bool ladrefVDDCMP)
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{
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/* Make sure interrupt flag is not set during read OR/AND and write operation */
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uint32_t reg = (pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~(ACMP_LADSEL_MASK | ACMP_LADREF_BIT);
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/* Setup voltage ladder and ladder reference */
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if (!ladrefVDDCMP) {
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reg |= ACMP_LADREF_BIT;
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}
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pACMP->ACMP[index].CMP = reg | (ladsel << 24);
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}
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229
lpc_chip_15xx/src/adc_15xx.c
Normal file
229
lpc_chip_15xx/src/adc_15xx.c
Normal file
@@ -0,0 +1,229 @@
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/*
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* @brief LPC15xx ADC driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
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||||
****************************************************************************/
|
||||
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/* Set ADC interrupt bits (safe) */
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void Chip_ADC_SetIntBits(LPC_ADC_T *pADC, uint32_t intMask)
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{
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uint32_t temp;
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/* Read and write values may not be the same, write 0 to
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undefined bits */
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temp = pADC->INTEN & 0x07FFFFFF;
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pADC->INTEN = temp | intMask;
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}
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/* Clear ADC interrupt bits (safe) */
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void Chip_ADC_ClearIntBits(LPC_ADC_T *pADC, uint32_t intMask)
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{
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uint32_t temp;
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/* Read and write values may not be the same, write 0 to
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undefined bits */
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temp = pADC->INTEN & 0x07FFFFFF;
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pADC->INTEN = temp & ~intMask;
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}
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/* Set ADC threshold selection bits (safe) */
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void Chip_ADC_SetTHRSELBits(LPC_ADC_T *pADC, uint32_t mask)
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{
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uint32_t temp;
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/* Read and write values may not be the same, write 0 to
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undefined bits */
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temp = pADC->CHAN_THRSEL & 0x00000FFF;
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pADC->CHAN_THRSEL = temp | mask;
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}
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/* Clear ADC threshold selection bits (safe) */
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void Chip_ADC_ClearTHRSELBits(LPC_ADC_T *pADC, uint32_t mask)
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{
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uint32_t temp;
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/* Read and write values may not be the same, write 0 to
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undefined bits */
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temp = pADC->CHAN_THRSEL & 0x00000FFF;
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pADC->CHAN_THRSEL = temp & ~mask;
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}
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Initialize the ADC peripheral */
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void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags)
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{
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/* Power up ADC and enable ADC base clock */
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if (pADC == LPC_ADC0) {
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Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC0_PD);
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Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC0);
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Chip_SYSCTL_PeriphReset(RESET_ADC0);
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}
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else {
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Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC1_PD);
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Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC1);
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Chip_SYSCTL_PeriphReset(RESET_ADC1);
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}
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/* Disable ADC interrupts */
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pADC->INTEN = 0;
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/* Set ADC control options */
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pADC->CTRL = flags;
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}
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/* Shutdown ADC */
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void Chip_ADC_DeInit(LPC_ADC_T *pADC)
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{
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pADC->INTEN = 0;
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pADC->CTRL = 0;
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/* Stop ADC clock and then power down ADC */
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if (pADC == LPC_ADC0) {
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Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_ADC0);
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Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_ADC0_PD);
|
||||
}
|
||||
else {
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Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_ADC1);
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Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_ADC1_PD);
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}
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}
|
||||
|
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/* Set ADC clock rate */
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void Chip_ADC_SetClockRate(LPC_ADC_T *pADC, uint32_t rate)
|
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{
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uint32_t div;
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/* Get ADC clock source to determine base ADC rate. IN sychronous mode,
|
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the ADC base clock comes from the system clock. In ASYNC mode, it
|
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comes from the ASYNC ADC clock and this function doesn't work. */
|
||||
div = Chip_Clock_GetSystemClockRate() / rate;
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if (div == 0) {
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div = 1;
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}
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||||
|
||||
Chip_ADC_SetDivider(pADC, (uint8_t) div - 1);
|
||||
}
|
||||
|
||||
/* Start ADC calibration */
|
||||
void Chip_ADC_StartCalibration(LPC_ADC_T *pADC)
|
||||
{
|
||||
/* Set calibration mode */
|
||||
pADC->CTRL |= ADC_CR_CALMODEBIT;
|
||||
|
||||
/* Clear ASYNC bit */
|
||||
pADC->CTRL &= ~ADC_CR_ASYNMODE;
|
||||
|
||||
/* Setup ADC for about 500KHz (per UM) */
|
||||
Chip_ADC_SetClockRate(pADC, 500000);
|
||||
|
||||
/* Clearn low power bit */
|
||||
pADC->CTRL &= ~ADC_CR_LPWRMODEBIT;
|
||||
|
||||
/* Calibration is only complete when ADC_CR_CALMODEBIT bit has cleared */
|
||||
}
|
||||
|
||||
/* Helper function for safely setting ADC sequencer register bits */
|
||||
void Chip_ADC_SetSequencerBits(LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex, uint32_t bits)
|
||||
{
|
||||
uint32_t temp;
|
||||
|
||||
/* Read sequencer register and mask off bits 20..25 */
|
||||
temp = pADC->SEQ_CTRL[seqIndex] & ~(0x3F << 20);
|
||||
|
||||
/* OR in passed bits */
|
||||
pADC->SEQ_CTRL[seqIndex] = temp | bits;
|
||||
}
|
||||
|
||||
/* Helper function for safely clearing ADC sequencer register bits */
|
||||
void Chip_ADC_ClearSequencerBits(LPC_ADC_T *pADC, ADC_SEQ_IDX_T seqIndex, uint32_t bits)
|
||||
{
|
||||
uint32_t temp;
|
||||
|
||||
/* Read sequencer register and mask off bits 20..25 */
|
||||
temp = pADC->SEQ_CTRL[seqIndex] & ~(0x3F << 20);
|
||||
|
||||
/* OR in passed bits */
|
||||
pADC->SEQ_CTRL[seqIndex] = temp & ~bits;
|
||||
}
|
||||
|
||||
/* Enable interrupts in ADC (sequencers A/B and overrun) */
|
||||
void Chip_ADC_EnableInt(LPC_ADC_T *pADC, uint32_t intMask)
|
||||
{
|
||||
Chip_ADC_SetIntBits(pADC, intMask);
|
||||
}
|
||||
|
||||
/* Disable interrupts in ADC (sequencers A/B and overrun) */
|
||||
void Chip_ADC_DisableInt(LPC_ADC_T *pADC, uint32_t intMask)
|
||||
{
|
||||
Chip_ADC_ClearIntBits(pADC, intMask);
|
||||
}
|
||||
|
||||
/* Enable a threshold event interrupt in ADC */
|
||||
void Chip_ADC_SetThresholdInt(LPC_ADC_T *pADC, uint8_t ch, ADC_INTEN_THCMP_T thInt)
|
||||
{
|
||||
int shiftIndex = 3 + (ch * 2);
|
||||
|
||||
/* Clear current bits first */
|
||||
Chip_ADC_ClearIntBits(pADC, (ADC_INTEN_CMP_MASK << shiftIndex));
|
||||
|
||||
/* Set new threshold interrupt type */
|
||||
Chip_ADC_SetIntBits(pADC, ((uint32_t) thInt << shiftIndex));
|
||||
}
|
||||
|
||||
/* Select threshold 0 values for comparison for selected channels */
|
||||
void Chip_ADC_SelectTH0Channels(LPC_ADC_T *pADC, uint32_t channels)
|
||||
{
|
||||
Chip_ADC_ClearTHRSELBits(pADC, channels);
|
||||
}
|
||||
|
||||
/* Select threshold 1 value for comparison for selected channels */
|
||||
void Chip_ADC_SelectTH1Channels(LPC_ADC_T *pADC, uint32_t channels)
|
||||
{
|
||||
Chip_ADC_SetTHRSELBits(pADC, channels);
|
||||
}
|
||||
85
lpc_chip_15xx/src/chip_15xx.c
Normal file
85
lpc_chip_15xx/src/chip_15xx.c
Normal file
@@ -0,0 +1,85 @@
|
||||
/*
|
||||
* @brief LPC15xx Miscellaneous chip specific functions
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/* System Clock Frequency (Core Clock) */
|
||||
uint32_t SystemCoreClock;
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Update system core clock rate, should be called if the system has
|
||||
a clock rate change */
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
/* CPU core speed */
|
||||
SystemCoreClock = Chip_Clock_GetSystemClockRate();
|
||||
}
|
||||
|
||||
void Chip_USB_Init(void)
|
||||
{
|
||||
/* Set USB PLL input to main oscillator */
|
||||
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
|
||||
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
|
||||
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
|
||||
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
|
||||
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
|
||||
Chip_Clock_SetupUSBPLL(3, 1);
|
||||
|
||||
/* Powerup USB PLL */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
while (!Chip_Clock_IsUSBPLLLocked()) {}
|
||||
|
||||
/* enable USB main clock */
|
||||
Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1);
|
||||
/* Enable AHB clock to the USB block. */
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB);
|
||||
/* power UP USB Phy */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPHY_PD);
|
||||
/* Reset USB block */
|
||||
Chip_SYSCTL_PeriphReset(RESET_USB);
|
||||
}
|
||||
403
lpc_chip_15xx/src/clock_15xx.c
Normal file
403
lpc_chip_15xx/src/clock_15xx.c
Normal file
@@ -0,0 +1,403 @@
|
||||
/*
|
||||
* @brief LPC15XX System clock control functions
|
||||
*
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Compute a PLL frequency */
|
||||
STATIC uint32_t Chip_Clock_GetPLLFreq(uint32_t PLLReg, uint32_t inputRate)
|
||||
{
|
||||
uint32_t msel = ((PLLReg & 0x3F) + 1);
|
||||
|
||||
return inputRate * msel;
|
||||
}
|
||||
|
||||
/* Return a PLL input (common) */
|
||||
STATIC uint32_t Chip_Clock_GetPLLInClockRate(uint32_t reg)
|
||||
{
|
||||
uint32_t clkRate;
|
||||
|
||||
switch ((CHIP_SYSCTL_PLLCLKSRC_T) (reg & 0x3)) {
|
||||
case SYSCTL_PLLCLKSRC_IRC:
|
||||
clkRate = Chip_Clock_GetIntOscRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_PLLCLKSRC_MAINOSC:
|
||||
clkRate = Chip_Clock_GetMainOscRate();
|
||||
break;
|
||||
|
||||
default:
|
||||
clkRate = 0;
|
||||
}
|
||||
|
||||
return clkRate;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Return System PLL input clock rate */
|
||||
uint32_t Chip_Clock_GetSystemPLLInClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLInClockRate(LPC_SYSCTL->SYSPLLCLKSEL);
|
||||
}
|
||||
|
||||
/* Return System PLL output clock rate */
|
||||
uint32_t Chip_Clock_GetSystemPLLOutClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLFreq(LPC_SYSCTL->SYSPLLCTRL,
|
||||
Chip_Clock_GetSystemPLLInClockRate());
|
||||
}
|
||||
|
||||
/* Return USB PLL input clock rate */
|
||||
uint32_t Chip_Clock_GetUSBPLLInClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLInClockRate(LPC_SYSCTL->USBPLLCLKSEL);
|
||||
}
|
||||
|
||||
/* Return USB PLL output clock rate */
|
||||
uint32_t Chip_Clock_GetUSBPLLOutClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLFreq(LPC_SYSCTL->USBPLLCTRL,
|
||||
Chip_Clock_GetUSBPLLInClockRate());
|
||||
}
|
||||
|
||||
/* Return SCT PLL input clock rate */
|
||||
uint32_t Chip_Clock_GetSCTPLLInClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLInClockRate(LPC_SYSCTL->SCTPLLCLKSEL);
|
||||
}
|
||||
|
||||
/* Return SCT PLL output clock rate */
|
||||
uint32_t Chip_Clock_GetSCTPLLOutClockRate(void)
|
||||
{
|
||||
return Chip_Clock_GetPLLFreq(LPC_SYSCTL->SCTPLLCTRL,
|
||||
Chip_Clock_GetSCTPLLInClockRate());
|
||||
}
|
||||
|
||||
/* Return main A clock rate */
|
||||
uint32_t Chip_Clock_GetMain_A_ClockRate(void)
|
||||
{
|
||||
uint32_t clkRate = 0;
|
||||
|
||||
switch (Chip_Clock_GetMain_A_ClockSource()) {
|
||||
case SYSCTL_MAIN_A_CLKSRC_IRC:
|
||||
clkRate = Chip_Clock_GetIntOscRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_MAIN_A_CLKSRCA_MAINOSC:
|
||||
clkRate = Chip_Clock_GetMainOscRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_MAIN_A_CLKSRCA_WDTOSC:
|
||||
clkRate = Chip_Clock_GetWDTOSCRate();
|
||||
break;
|
||||
|
||||
default:
|
||||
clkRate = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
return clkRate;
|
||||
}
|
||||
|
||||
/* Return main B clock rate */
|
||||
uint32_t Chip_Clock_GetMain_B_ClockRate(void)
|
||||
{
|
||||
uint32_t clkRate = 0;
|
||||
|
||||
switch (Chip_Clock_GetMain_B_ClockSource()) {
|
||||
case SYSCTL_MAIN_B_CLKSRC_MAINCLKSELA:
|
||||
clkRate = Chip_Clock_GetMain_A_ClockRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_MAIN_B_CLKSRC_SYSPLLIN:
|
||||
clkRate = Chip_Clock_GetSystemPLLInClockRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_MAIN_B_CLKSRC_SYSPLLOUT:
|
||||
clkRate = Chip_Clock_GetSystemPLLOutClockRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_MAIN_B_CLKSRC_RTC:
|
||||
clkRate = Chip_Clock_GetRTCOscRate();
|
||||
break;
|
||||
}
|
||||
|
||||
return clkRate;
|
||||
}
|
||||
|
||||
/* Set main system clock source */
|
||||
void Chip_Clock_SetMainClockSource(CHIP_SYSCTL_MAINCLKSRC_T src)
|
||||
{
|
||||
uint32_t clkSrc = (uint32_t) src;
|
||||
|
||||
if (clkSrc >= 4) {
|
||||
/* Main B source only, not using main A */
|
||||
Chip_Clock_SetMain_B_ClockSource((CHIP_SYSCTL_MAIN_B_CLKSRC_T) (clkSrc - 4));
|
||||
}
|
||||
else {
|
||||
/* Select main A clock source and set main B source to use main A */
|
||||
Chip_Clock_SetMain_A_ClockSource((CHIP_SYSCTL_MAIN_A_CLKSRC_T) clkSrc);
|
||||
Chip_Clock_SetMain_B_ClockSource(SYSCTL_MAIN_B_CLKSRC_MAINCLKSELA);
|
||||
}
|
||||
}
|
||||
|
||||
/* Returns the main clock source */
|
||||
CHIP_SYSCTL_MAINCLKSRC_T Chip_Clock_GetMainClockSource(void)
|
||||
{
|
||||
CHIP_SYSCTL_MAIN_B_CLKSRC_T srcB;
|
||||
uint32_t clkSrc;
|
||||
|
||||
/* Get main B clock source */
|
||||
srcB = Chip_Clock_GetMain_B_ClockSource();
|
||||
if (srcB == SYSCTL_MAIN_B_CLKSRC_MAINCLKSELA) {
|
||||
/* Using source A, so return source A */
|
||||
clkSrc = (uint32_t) Chip_Clock_GetMain_A_ClockSource();
|
||||
}
|
||||
else {
|
||||
/* Using source B */
|
||||
clkSrc = 4 + (uint32_t) srcB;
|
||||
}
|
||||
|
||||
return (CHIP_SYSCTL_MAINCLKSRC_T) clkSrc;
|
||||
}
|
||||
|
||||
/* Return main clock rate */
|
||||
uint32_t Chip_Clock_GetMainClockRate(void)
|
||||
{
|
||||
uint32_t clkRate;
|
||||
|
||||
if (Chip_Clock_GetMain_B_ClockSource() == SYSCTL_MAIN_B_CLKSRC_MAINCLKSELA) {
|
||||
/* Return main A clock rate */
|
||||
clkRate = Chip_Clock_GetMain_A_ClockRate();
|
||||
}
|
||||
else {
|
||||
/* Return main B clock rate */
|
||||
clkRate = Chip_Clock_GetMain_B_ClockRate();
|
||||
}
|
||||
|
||||
return clkRate;
|
||||
}
|
||||
|
||||
/* Return ADC asynchronous clock rate */
|
||||
uint32_t Chip_Clock_GetADCASYNCRate(void)
|
||||
{
|
||||
uint32_t clkRate = 0;
|
||||
|
||||
switch (Chip_Clock_GetADCASYNCSource()) {
|
||||
case SYSCTL_ADCASYNCCLKSRC_IRC:
|
||||
clkRate = Chip_Clock_GetIntOscRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_ADCASYNCCLKSRC_SYSPLLOUT:
|
||||
clkRate = Chip_Clock_GetSystemPLLOutClockRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_ADCASYNCCLKSRC_USBPLLOUT:
|
||||
clkRate = Chip_Clock_GetUSBPLLOutClockRate();
|
||||
break;
|
||||
|
||||
case SYSCTL_ADCASYNCCLKSRC_SCTPLLOUT:
|
||||
clkRate = Chip_Clock_GetSCTPLLOutClockRate();
|
||||
break;
|
||||
}
|
||||
|
||||
return clkRate;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set CLKOUT clock source and divider
|
||||
* @param src : Clock source for CLKOUT
|
||||
* @param div : divider for CLKOUT clock
|
||||
* @return Nothing
|
||||
* @note Use 0 to disable, or a divider value of 1 to 255. The CLKOUT clock
|
||||
* rate is the clock source divided by the divider. This function will
|
||||
* also toggle the clock source update register to update the clock
|
||||
* source.
|
||||
*/
|
||||
void Chip_Clock_SetCLKOUTSource(CHIP_SYSCTL_CLKOUTSRC_T src, uint32_t div)
|
||||
{
|
||||
uint32_t srcClk = (uint32_t) src;
|
||||
|
||||
/* Use a clock A source? */
|
||||
if (src >= 4) {
|
||||
/* Not using a CLKOUT A source */
|
||||
LPC_SYSCTL->CLKOUTSEL[1] = srcClk - 4;
|
||||
}
|
||||
else {
|
||||
/* Using a clock A source, select A and then switch B to A */
|
||||
LPC_SYSCTL->CLKOUTSEL[0] = srcClk;
|
||||
LPC_SYSCTL->CLKOUTSEL[1] = 0;
|
||||
}
|
||||
|
||||
LPC_SYSCTL->CLKOUTDIV = div;
|
||||
}
|
||||
|
||||
/* Enable a system or peripheral clock */
|
||||
void Chip_Clock_EnablePeriphClock(CHIP_SYSCTL_CLOCK_T clk)
|
||||
{
|
||||
uint32_t clkEnab = (uint32_t) clk;
|
||||
|
||||
if (clkEnab >= 32) {
|
||||
LPC_SYSCTL->SYSAHBCLKCTRL[1] |= (1 << (clkEnab - 32));
|
||||
}
|
||||
else {
|
||||
LPC_SYSCTL->SYSAHBCLKCTRL[0] |= (1 << clkEnab);
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable a system or peripheral clock */
|
||||
void Chip_Clock_DisablePeriphClock(CHIP_SYSCTL_CLOCK_T clk)
|
||||
{
|
||||
uint32_t clkEnab = (uint32_t) clk;
|
||||
|
||||
if (clkEnab >= 32) {
|
||||
LPC_SYSCTL->SYSAHBCLKCTRL[1] &= ~(1 << (clkEnab - 32));
|
||||
}
|
||||
else {
|
||||
LPC_SYSCTL->SYSAHBCLKCTRL[0] &= ~(1 << clkEnab);
|
||||
}
|
||||
}
|
||||
|
||||
/* Returns the system tick rate as used with the system tick divider */
|
||||
uint32_t Chip_Clock_GetSysTickClockRate(void)
|
||||
{
|
||||
uint32_t sysRate, div;
|
||||
|
||||
div = Chip_Clock_GetSysTickClockDiv();
|
||||
|
||||
/* If divider is 0, the system tick clock is disabled */
|
||||
if (div == 0) {
|
||||
sysRate = 0;
|
||||
}
|
||||
else {
|
||||
sysRate = Chip_Clock_GetMainClockRate() / div;
|
||||
}
|
||||
|
||||
return sysRate;
|
||||
}
|
||||
|
||||
/* Get UART base rate */
|
||||
uint32_t Chip_Clock_GetUARTBaseClockRate(void)
|
||||
{
|
||||
uint64_t inclk;
|
||||
uint32_t div;
|
||||
|
||||
div = (uint32_t) Chip_Clock_GetUARTFRGDivider();
|
||||
if (div == 0) {
|
||||
/* Divider is 0 so UART clock is disabled */
|
||||
inclk = 0;
|
||||
}
|
||||
else {
|
||||
uint32_t mult, divmult;
|
||||
|
||||
/* Input clock into FRG block is the divided main system clock */
|
||||
inclk = (uint64_t) (Chip_Clock_GetMainClockRate() / div);
|
||||
|
||||
divmult = LPC_SYSCTL->FRGCTRL & 0xFFFF;
|
||||
if ((divmult & 0xFF) == 0xFF) {
|
||||
/* Fractional part is enabled, get multiplier */
|
||||
mult = (divmult >> 8) & 0xFF;
|
||||
|
||||
/* Get fractional error */
|
||||
inclk = (inclk * 256) / (uint64_t) (256 + mult);
|
||||
}
|
||||
}
|
||||
|
||||
return (uint32_t) inclk;
|
||||
}
|
||||
|
||||
/* Set UART base rate */
|
||||
uint32_t Chip_Clock_SetUARTBaseClockRate(uint32_t rate, bool fEnable)
|
||||
{
|
||||
uint32_t div, inclk;
|
||||
|
||||
/* Input clock into FRG block is the main system cloock */
|
||||
inclk = Chip_Clock_GetMainClockRate();
|
||||
|
||||
/* Get integer divider for coarse rate */
|
||||
div = inclk / rate;
|
||||
if (div == 0) {
|
||||
div = 1;
|
||||
}
|
||||
|
||||
/* Approximated rate with only integer divider */
|
||||
Chip_Clock_SetUARTFRGDivider((uint8_t) div);
|
||||
|
||||
if (fEnable) {
|
||||
uint32_t err;
|
||||
uint64_t uart_fra_multiplier;
|
||||
|
||||
err = inclk - (rate * div);
|
||||
uart_fra_multiplier = ((uint64_t) err * 256) / (uint64_t) (rate * div);
|
||||
|
||||
/* Enable fractional divider and set multiplier */
|
||||
LPC_SYSCTL->FRGCTRL = 0xFF | ((uart_fra_multiplier & 0xFF) << 8);
|
||||
}
|
||||
else {
|
||||
/* Disable fractional generator and use integer divider only */
|
||||
LPC_SYSCTL->FRGCTRL = 0;
|
||||
}
|
||||
|
||||
return Chip_Clock_GetUARTBaseClockRate();
|
||||
}
|
||||
|
||||
/* Bypass System Oscillator and set oscillator frequency range */
|
||||
void Chip_Clock_SetPLLBypass(bool bypass, bool highfr)
|
||||
{
|
||||
uint32_t ctrl = 0;
|
||||
|
||||
if (bypass) {
|
||||
ctrl |= (1 << 0);
|
||||
}
|
||||
if (highfr) {
|
||||
ctrl |= (1 << 1);
|
||||
}
|
||||
|
||||
LPC_SYSCTL->SYSOSCCTRL = ctrl;
|
||||
}
|
||||
|
||||
/* Return system clock rate */
|
||||
uint32_t Chip_Clock_GetSystemClockRate(void)
|
||||
{
|
||||
/* No point in checking for divide by 0 */
|
||||
return Chip_Clock_GetMainClockRate() / LPC_SYSCTL->SYSAHBCLKDIV;
|
||||
}
|
||||
118
lpc_chip_15xx/src/crc_15xx.c
Normal file
118
lpc_chip_15xx/src/crc_15xx.c
Normal file
@@ -0,0 +1,118 @@
|
||||
/*
|
||||
* @brief LPC15xx Cyclic Redundancy Check (CRC) Engine driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licenser disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize CRC engine */
|
||||
void Chip_CRC_Init(void)
|
||||
{
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_CRC);
|
||||
Chip_SYSCTL_PeriphReset(RESET_CRC);
|
||||
}
|
||||
|
||||
/* De-initialize CRC engine */
|
||||
void Chip_CRC_Deinit(void)
|
||||
{
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_CRC);
|
||||
}
|
||||
|
||||
/* Sets up the CRC engine with defaults based on the polynomial to be used */
|
||||
void Chip_CRC_UseDefaultConfig(CRC_POLY_T poly)
|
||||
{
|
||||
switch (poly) {
|
||||
case CRC_POLY_CRC16:
|
||||
Chip_CRC_UseCRC16();
|
||||
break;
|
||||
|
||||
case CRC_POLY_CRC32:
|
||||
Chip_CRC_UseCRC32();
|
||||
break;
|
||||
|
||||
case CRC_POLY_CCITT:
|
||||
default:
|
||||
Chip_CRC_UseCCITT();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* configure CRC engine and compute CCITT checksum from 8-bit data */
|
||||
uint32_t Chip_CRC_CRC8(const uint8_t *data, uint32_t bytes)
|
||||
{
|
||||
Chip_CRC_UseCCITT();
|
||||
while (bytes > 0) {
|
||||
Chip_CRC_Write8(*data);
|
||||
data++;
|
||||
bytes--;
|
||||
}
|
||||
|
||||
return Chip_CRC_Sum();
|
||||
}
|
||||
|
||||
/* Convenience function for computing a standard CRC16 checksum from 16-bit data block */
|
||||
uint32_t Chip_CRC_CRC16(const uint16_t *data, uint32_t hwords)
|
||||
{
|
||||
Chip_CRC_UseCRC16();
|
||||
while (hwords > 0) {
|
||||
Chip_CRC_Write16(*data);
|
||||
data++;
|
||||
hwords--;
|
||||
}
|
||||
|
||||
return Chip_CRC_Sum();
|
||||
}
|
||||
|
||||
/* Convenience function for computing a standard CRC32 checksum from 32-bit data block */
|
||||
uint32_t Chip_CRC_CRC32(const uint32_t *data, uint32_t words)
|
||||
{
|
||||
Chip_CRC_UseCRC32();
|
||||
while (words > 0) {
|
||||
Chip_CRC_Write32(*data);
|
||||
data++;
|
||||
words--;
|
||||
}
|
||||
|
||||
return Chip_CRC_Sum();
|
||||
}
|
||||
62
lpc_chip_15xx/src/dac_15xx.c
Normal file
62
lpc_chip_15xx/src/dac_15xx.c
Normal file
@@ -0,0 +1,62 @@
|
||||
/*
|
||||
* @brief LPC15xx D/A conversion driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize the DAC peripheral */
|
||||
void Chip_DAC_Init(LPC_DAC_T *pDAC)
|
||||
{
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_DAC_PD);
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_DAC);
|
||||
}
|
||||
|
||||
/* Shutdown DAC peripheral */
|
||||
void Chip_DAC_DeInit(LPC_DAC_T *pDAC)
|
||||
{
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_DAC);
|
||||
Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_DAC_PD);
|
||||
}
|
||||
115
lpc_chip_15xx/src/dma_15xx.c
Normal file
115
lpc_chip_15xx/src/dma_15xx.c
Normal file
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
* @brief LPC15xx DMA chip driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/* DMA SRAM table - this can be optionally used with the Chip_DMA_SetSRAMBase()
|
||||
function if a DMA SRAM table is needed. This table is correctly aligned for
|
||||
the DMA controller. */
|
||||
#if defined(__CC_ARM)
|
||||
/* Keil alignement to 512 bytes */
|
||||
__align(512) DMA_CHDESC_T Chip_DMA_Table[MAX_DMA_CHANNEL];
|
||||
#endif /* defined (__CC_ARM) */
|
||||
|
||||
/* IAR support */
|
||||
#if defined(__ICCARM__)
|
||||
/* IAR EWARM alignement to 512 bytes */
|
||||
#pragma data_alignment=512
|
||||
DMA_CHDESC_T Chip_DMA_Table[MAX_DMA_CHANNEL];
|
||||
#endif /* defined (__ICCARM__) */
|
||||
|
||||
#if defined( __GNUC__ )
|
||||
/* GNU alignement to 512 bytes */
|
||||
DMA_CHDESC_T Chip_DMA_Table[MAX_DMA_CHANNEL] __attribute__ ((aligned(512)));
|
||||
#endif /* defined (__GNUC__) */
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Set DMA transfer register interrupt bits (safe) */
|
||||
void Chip_DMA_SetTranBits(LPC_DMA_T *pDMA, DMA_CHID_T ch, uint32_t mask)
|
||||
{
|
||||
uint32_t temp;
|
||||
|
||||
/* Read and write values may not be the same, write 0 to
|
||||
undefined bits */
|
||||
temp = pDMA->DMACH[ch].XFERCFG & ~0xFC000CC0;
|
||||
|
||||
pDMA->DMACH[ch].XFERCFG = temp | mask;
|
||||
}
|
||||
|
||||
/* Clear DMA transfer register interrupt bits (safe) */
|
||||
void Chip_DMA_ClearTranBits(LPC_DMA_T *pDMA, DMA_CHID_T ch, uint32_t mask)
|
||||
{
|
||||
uint32_t temp;
|
||||
|
||||
/* Read and write values may not be the same, write 0 to
|
||||
undefined bits */
|
||||
temp = pDMA->DMACH[ch].XFERCFG & ~0xFC000CC0;
|
||||
|
||||
pDMA->DMACH[ch].XFERCFG = temp & ~mask;
|
||||
}
|
||||
|
||||
/* Update the transfer size in an existing DMA channel transfer configuration */
|
||||
void Chip_DMA_SetupChannelTransferSize(LPC_DMA_T *pDMA, DMA_CHID_T ch, uint32_t trans)
|
||||
{
|
||||
Chip_DMA_ClearTranBits(pDMA, ch, (0x3FF << 16));
|
||||
Chip_DMA_SetTranBits(pDMA, ch, DMA_XFERCFG_XFERCOUNT(trans));
|
||||
}
|
||||
|
||||
/* Sets up a DMA channel with the passed DMA transfer descriptor */
|
||||
bool Chip_DMA_SetupTranChannel(LPC_DMA_T *pDMA, DMA_CHID_T ch, DMA_CHDESC_T *desc)
|
||||
{
|
||||
bool good = false;
|
||||
DMA_CHDESC_T *pDesc = (DMA_CHDESC_T *) pDMA->SRAMBASE;
|
||||
|
||||
if ((Chip_DMA_GetActiveChannels(pDMA) & (1 << ch)) == 0) {
|
||||
/* Channel is not active, so update the descriptor */
|
||||
pDesc[ch] = *desc;
|
||||
|
||||
good = true;
|
||||
}
|
||||
|
||||
return good;
|
||||
}
|
||||
79
lpc_chip_15xx/src/eeprom.c
Normal file
79
lpc_chip_15xx/src/eeprom.c
Normal file
@@ -0,0 +1,79 @@
|
||||
/*
|
||||
* @brief Common EEPROM support functions
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
#include "eeprom.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Write data to EEPROM */
|
||||
uint8_t Chip_EEPROM_Write(uint32_t dstAdd, uint8_t *ptr, uint32_t byteswrt)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_EEPROM_WRITE;
|
||||
command[1] = dstAdd;
|
||||
command[2] = (uint32_t) ptr;
|
||||
command[3] = byteswrt;
|
||||
command[4] = SystemCoreClock / 1000;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Read data from EEPROM */
|
||||
uint8_t Chip_EEPROM_Read(uint32_t srcAdd, uint8_t *ptr, uint32_t bytesrd)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_EEPROM_READ;
|
||||
command[1] = srcAdd;
|
||||
command[2] = (uint32_t) ptr;
|
||||
command[3] = bytesrd;
|
||||
command[4] = SystemCoreClock / 1000;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
112
lpc_chip_15xx/src/gpio_15xx.c
Normal file
112
lpc_chip_15xx/src/gpio_15xx.c
Normal file
@@ -0,0 +1,112 @@
|
||||
/*
|
||||
* @brief LPC15xx GPIO driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize GPIO block */
|
||||
void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
|
||||
{
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO0);
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO1);
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO2);
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_MUX);
|
||||
|
||||
Chip_SYSCTL_PeriphReset(RESET_MUX);
|
||||
}
|
||||
|
||||
/* De-Initialize GPIO block */
|
||||
void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO)
|
||||
{
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GPIO0);
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GPIO1);
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GPIO2);
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_MUX);
|
||||
}
|
||||
|
||||
/* Set a GPIO direction */
|
||||
void Chip_GPIO_WriteDirBit(LPC_GPIO_T *pGPIO, uint32_t port, uint8_t bit, bool setting)
|
||||
{
|
||||
if (setting) {
|
||||
pGPIO->DIR[port] |= 1UL << bit;
|
||||
}
|
||||
else {
|
||||
pGPIO->DIR[port] &= ~(1UL << bit);
|
||||
}
|
||||
}
|
||||
|
||||
/* Set Direction for a GPIO port */
|
||||
void Chip_GPIO_SetDir(LPC_GPIO_T *pGPIO, uint8_t portNum, uint32_t bitValue, uint8_t out)
|
||||
{
|
||||
if (out) {
|
||||
pGPIO->DIR[portNum] |= bitValue;
|
||||
}
|
||||
else {
|
||||
pGPIO->DIR[portNum] &= ~bitValue;
|
||||
}
|
||||
}
|
||||
|
||||
/* Set GPIO direction for a single GPIO pin */
|
||||
void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output)
|
||||
{
|
||||
if (output) {
|
||||
Chip_GPIO_SetPinDIROutput(pGPIO, port, pin);
|
||||
}
|
||||
else {
|
||||
Chip_GPIO_SetPinDIRInput(pGPIO, port, pin);
|
||||
}
|
||||
}
|
||||
|
||||
/* Set GPIO direction for a all selected GPIO pins to an input or output */
|
||||
void Chip_GPIO_SetPortDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint32_t pinMask, bool outSet)
|
||||
{
|
||||
if (outSet) {
|
||||
Chip_GPIO_SetPortDIROutput(pGPIO, port, pinMask);
|
||||
}
|
||||
else {
|
||||
Chip_GPIO_SetPortDIRInput(pGPIO, port, pinMask);
|
||||
}
|
||||
}
|
||||
65
lpc_chip_15xx/src/i2c_common_15xx.c
Normal file
65
lpc_chip_15xx/src/i2c_common_15xx.c
Normal file
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* @brief LPC15xx I2C Common driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initializes the LPC_I2C peripheral */
|
||||
void Chip_I2C_Init(LPC_I2C_T *pI2C)
|
||||
{
|
||||
/* Enable I2C clock */
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_I2C0);
|
||||
|
||||
/* Peripheral reset control to I2C */
|
||||
Chip_SYSCTL_PeriphReset(RESET_I2C0);
|
||||
}
|
||||
|
||||
/* Shuts down the I2C controller block */
|
||||
void Chip_I2C_DeInit(LPC_I2C_T *pI2C)
|
||||
{
|
||||
/* Disable I2C clock */
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_I2C0);
|
||||
}
|
||||
178
lpc_chip_15xx/src/i2cm_15xx.c
Normal file
178
lpc_chip_15xx/src/i2cm_15xx.c
Normal file
@@ -0,0 +1,178 @@
|
||||
/*
|
||||
* @brief LPC15xx I2C master driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Set up bus speed for LPC_I2C interface */
|
||||
void Chip_I2CM_SetBusSpeed(LPC_I2C_T *pI2C, uint32_t busSpeed)
|
||||
{
|
||||
uint32_t scl = Chip_Clock_GetMainClockRate() / (Chip_I2C_GetClockDiv(pI2C) * busSpeed);
|
||||
Chip_I2CM_SetDutyCycle(pI2C, (scl >> 1), (scl - (scl >> 1)));
|
||||
}
|
||||
|
||||
/* Master transfer state change handler handler */
|
||||
uint32_t Chip_I2CM_XferHandler(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
|
||||
{
|
||||
uint32_t status = Chip_I2CM_GetStatus(pI2C);
|
||||
/* Master Lost Arbitration */
|
||||
if (status & I2C_STAT_MSTRARBLOSS) {
|
||||
/* Set transfer status as Arbitration Lost */
|
||||
xfer->status = I2CM_STATUS_ARBLOST;
|
||||
/* Clear Status Flags */
|
||||
Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS);
|
||||
}
|
||||
/* Master Start Stop Error */
|
||||
else if (status & I2C_STAT_MSTSTSTPERR) {
|
||||
/* Set transfer status as Bus Error */
|
||||
xfer->status = I2CM_STATUS_BUS_ERROR;
|
||||
/* Clear Status Flags */
|
||||
Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTSTSTPERR);
|
||||
}
|
||||
/* Master is Pending */
|
||||
else if (status & I2C_STAT_MSTPENDING) {
|
||||
/* Branch based on Master State Code */
|
||||
switch (Chip_I2CM_GetMasterState(pI2C)) {
|
||||
/* Master idle */
|
||||
case I2C_STAT_MSTCODE_IDLE:
|
||||
/* Do Nothing */
|
||||
break;
|
||||
|
||||
/* Receive data is available */
|
||||
case I2C_STAT_MSTCODE_RXREADY:
|
||||
/* Read Data */
|
||||
*xfer->rxBuff++ = pI2C->MSTDAT;
|
||||
xfer->rxSz--;
|
||||
if (xfer->rxSz) {
|
||||
/* Set Continue if there is more data to read */
|
||||
Chip_I2CM_MasterContinue(pI2C);
|
||||
}
|
||||
else {
|
||||
/* Set transfer status as OK */
|
||||
xfer->status = I2CM_STATUS_OK;
|
||||
/* No data to read send Stop */
|
||||
Chip_I2CM_SendStop(pI2C);
|
||||
}
|
||||
break;
|
||||
|
||||
/* Master Transmit available */
|
||||
case I2C_STAT_MSTCODE_TXREADY:
|
||||
if (xfer->txSz) {
|
||||
/* If Tx data available transmit data and continue */
|
||||
pI2C->MSTDAT = *xfer->txBuff++;
|
||||
xfer->txSz--;
|
||||
Chip_I2CM_MasterContinue(pI2C);
|
||||
}
|
||||
else {
|
||||
/* If receive queued after transmit then initiate master receive transfer*/
|
||||
if (xfer->rxSz) {
|
||||
/* Write Address and RW bit to data register */
|
||||
Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | 0x1);
|
||||
/* Enter to Master Transmitter mode */
|
||||
Chip_I2CM_SendStart(pI2C);
|
||||
}
|
||||
else {
|
||||
/* If no receive queued then set transfer status as OK */
|
||||
xfer->status = I2CM_STATUS_OK;
|
||||
/* Send Stop */
|
||||
Chip_I2CM_SendStop(pI2C);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case I2C_STAT_MSTCODE_NACKADR:
|
||||
/* Set transfer status as NACK on address */
|
||||
xfer->status = I2CM_STATUS_NAK_ADR;
|
||||
Chip_I2CM_SendStop(pI2C);
|
||||
break;
|
||||
|
||||
case I2C_STAT_MSTCODE_NACKDAT:
|
||||
/* Set transfer status as NACK on data */
|
||||
xfer->status = I2CM_STATUS_NAK_DAT;
|
||||
Chip_I2CM_SendStop(pI2C);
|
||||
break;
|
||||
|
||||
default:
|
||||
/* Default case should not occur*/
|
||||
xfer->status = I2CM_STATUS_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else {
|
||||
/* Default case should not occur */
|
||||
xfer->status = I2CM_STATUS_ERROR;
|
||||
}
|
||||
return xfer->status != I2CM_STATUS_BUSY;
|
||||
}
|
||||
|
||||
/* Transmit and Receive data in master mode */
|
||||
void Chip_I2CM_Xfer(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
|
||||
{
|
||||
/* set the transfer status as busy */
|
||||
xfer->status = I2CM_STATUS_BUSY;
|
||||
/* Clear controller state. */
|
||||
Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
|
||||
/* Write Address and RW bit to data register */
|
||||
Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0));
|
||||
/* Enter to Master Transmitter mode */
|
||||
Chip_I2CM_SendStart(pI2C);
|
||||
}
|
||||
|
||||
/* Transmit and Receive data in master mode */
|
||||
uint32_t Chip_I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
|
||||
{
|
||||
uint32_t ret = 0;
|
||||
/* start transfer */
|
||||
Chip_I2CM_Xfer(pI2C, xfer);
|
||||
|
||||
while (ret == 0) {
|
||||
/* wait for status change interrupt */
|
||||
while (!Chip_I2CM_IsMasterPending(pI2C)) {}
|
||||
/* call state change handler */
|
||||
ret = Chip_I2CM_XferHandler(pI2C, xfer);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
98
lpc_chip_15xx/src/i2cs_15xx.c
Normal file
98
lpc_chip_15xx/src/i2cs_15xx.c
Normal file
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* @brief LPC15xx I2C slave driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Slave transfer state change handler */
|
||||
uint32_t Chip_I2CS_XferHandler(LPC_I2C_T *pI2C, const I2CS_XFER_T *xfers)
|
||||
{
|
||||
uint32_t done = 0;
|
||||
|
||||
uint8_t data;
|
||||
uint32_t state;
|
||||
|
||||
/* transfer complete? */
|
||||
if ((Chip_I2C_GetPendingInt(pI2C) & I2C_INTENSET_SLVDESEL) != 0) {
|
||||
Chip_I2CS_ClearStatus(pI2C, I2C_STAT_SLVDESEL);
|
||||
xfers->slaveDone();
|
||||
}
|
||||
else {
|
||||
/* Determine the current I2C slave state */
|
||||
state = Chip_I2CS_GetSlaveState(pI2C);
|
||||
|
||||
switch (state) {
|
||||
case I2C_STAT_SLVCODE_ADDR: /* Slave address received */
|
||||
/* Get slave address that needs servicing */
|
||||
data = Chip_I2CS_GetSlaveAddr(pI2C, Chip_I2CS_GetSlaveMatchIndex(pI2C));
|
||||
|
||||
/* Call address callback */
|
||||
xfers->slaveStart(data);
|
||||
break;
|
||||
|
||||
case I2C_STAT_SLVCODE_RX: /* Data byte received */
|
||||
/* Get received data */
|
||||
data = Chip_I2CS_ReadByte(pI2C);
|
||||
done = xfers->slaveRecv(data);
|
||||
break;
|
||||
|
||||
case I2C_STAT_SLVCODE_TX: /* Get byte that needs to be sent */
|
||||
/* Get data to send */
|
||||
done = xfers->slaveSend(&data);
|
||||
Chip_I2CS_WriteByte(pI2C, data);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (done == 0) {
|
||||
Chip_I2CS_SlaveContinue(pI2C);
|
||||
}
|
||||
else {
|
||||
Chip_I2CS_SlaveNACK(pI2C);
|
||||
}
|
||||
|
||||
return done;
|
||||
}
|
||||
179
lpc_chip_15xx/src/iap.c
Normal file
179
lpc_chip_15xx/src/iap.c
Normal file
@@ -0,0 +1,179 @@
|
||||
/*
|
||||
* @brief Common FLASH support functions
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Prepare sector for write operation */
|
||||
uint8_t Chip_IAP_PreSectorForReadWrite(uint32_t strSector, uint32_t endSector)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_PREWRRITE_CMD;
|
||||
command[1] = strSector;
|
||||
command[2] = endSector;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Copy RAM to flash */
|
||||
uint8_t Chip_IAP_CopyRamToFlash(uint32_t dstAdd, uint32_t *srcAdd, uint32_t byteswrt)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_WRISECTOR_CMD;
|
||||
command[1] = dstAdd;
|
||||
command[2] = (uint32_t) srcAdd;
|
||||
command[3] = byteswrt;
|
||||
command[4] = SystemCoreClock / 1000;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Erase sector */
|
||||
uint8_t Chip_IAP_EraseSector(uint32_t strSector, uint32_t endSector)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_ERSSECTOR_CMD;
|
||||
command[1] = strSector;
|
||||
command[2] = endSector;
|
||||
command[3] = SystemCoreClock / 1000;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Blank check sector */
|
||||
uint8_t Chip_IAP_BlankCheckSector(uint32_t strSector, uint32_t endSector)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_BLANK_CHECK_SECTOR_CMD;
|
||||
command[1] = strSector;
|
||||
command[2] = endSector;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Read part identification number */
|
||||
uint32_t Chip_IAP_ReadPID(void)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_REPID_CMD;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[1];
|
||||
}
|
||||
|
||||
/* Read boot code version number */
|
||||
uint32_t Chip_IAP_ReadBootCode(void)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_READ_BOOT_CODE_CMD;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[1] & 0xffff;
|
||||
}
|
||||
|
||||
/* IAP compare */
|
||||
uint8_t Chip_IAP_Compare(uint32_t dstAdd, uint32_t srcAdd, uint32_t bytescmp)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_COMPARE_CMD;
|
||||
command[1] = dstAdd;
|
||||
command[2] = srcAdd;
|
||||
command[3] = bytescmp;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Reinvoke ISP */
|
||||
uint8_t Chip_IAP_ReinvokeISP(void)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_REINVOKE_ISP_CMD;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Read the unique ID */
|
||||
uint32_t Chip_IAP_ReadUID(uint32_t* uid)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
uint32_t i;
|
||||
|
||||
command[0] = IAP_READ_UID_CMD;
|
||||
iap_entry(command, result);
|
||||
|
||||
for (i=0; i<4; i++)
|
||||
*(uid+i) = result[i+1];
|
||||
|
||||
return result[0];
|
||||
}
|
||||
|
||||
/* Erase page */
|
||||
uint8_t Chip_IAP_ErasePage(uint32_t strPage, uint32_t endPage)
|
||||
{
|
||||
uint32_t command[5], result[5];
|
||||
|
||||
command[0] = IAP_ERASE_PAGE_CMD;
|
||||
command[1] = strPage;
|
||||
command[2] = endPage;
|
||||
command[3] = SystemCoreClock / 1000;
|
||||
iap_entry(command, result);
|
||||
|
||||
return result[0];
|
||||
}
|
||||
56
lpc_chip_15xx/src/iocon_15xx.c
Normal file
56
lpc_chip_15xx/src/iocon_15xx.c
Normal file
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* @brief LPC15xx IOCON driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Set all I/O Control pin muxing */
|
||||
void Chip_IOCON_SetPinMuxing(LPC_IOCON_T *pIOCON, const PINMUX_GRP_T *pinArray, uint32_t arrayLength)
|
||||
{
|
||||
uint32_t ix;
|
||||
|
||||
for (ix = 0; ix < arrayLength; ix++ ) {
|
||||
Chip_IOCON_PinMuxSet(pIOCON, pinArray[ix].port, pinArray[ix].pin, pinArray[ix].modefunc);
|
||||
}
|
||||
}
|
||||
48
lpc_chip_15xx/src/pinint_15xx.c
Normal file
48
lpc_chip_15xx/src/pinint_15xx.c
Normal file
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* @brief LPC15xx Pin Interrupt driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licenser disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
103
lpc_chip_15xx/src/pmu_15xx.c
Normal file
103
lpc_chip_15xx/src/pmu_15xx.c
Normal file
@@ -0,0 +1,103 @@
|
||||
/*
|
||||
* @brief LPC15xx PMU chip driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Enter MCU Sleep mode */
|
||||
void Chip_PMU_SleepState(LPC_PMU_T *pPMU)
|
||||
{
|
||||
Chip_PMU_ClearSleepFlags(LPC_PMU, PMU_PCON_SLEEPFLAG | PMU_PCON_DPDFLAG);
|
||||
/* Enter sleep mode */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/* Enter MCU Deep Sleep mode */
|
||||
void Chip_PMU_DeepSleepState(LPC_PMU_T *pPMU)
|
||||
{
|
||||
Chip_PMU_ClearSleepFlags(LPC_PMU, PMU_PCON_SLEEPFLAG | PMU_PCON_DPDFLAG);
|
||||
SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos);
|
||||
/* Enter deep sleep mode */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/* Enter MCU Power down mode */
|
||||
void Chip_PMU_PowerDownState(LPC_PMU_T *pPMU)
|
||||
{
|
||||
Chip_PMU_ClearSleepFlags(LPC_PMU, PMU_PCON_SLEEPFLAG | PMU_PCON_DPDFLAG);
|
||||
SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos);
|
||||
// There seems to be no difference between Deep sleep and power down mode, use ROM API
|
||||
/* Enter power down mode */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/* Enter MCU Deep Power down mode */
|
||||
void Chip_PMU_DeepPowerDownState(LPC_PMU_T *pPMU)
|
||||
{
|
||||
Chip_PMU_ClearSleepFlags(LPC_PMU, PMU_PCON_SLEEPFLAG | PMU_PCON_DPDFLAG);
|
||||
SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos);
|
||||
pPMU->PCON = PMU_PCON_PM_DEEPPOWERDOWN;
|
||||
/* Enter deep power down mode */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/* Put some of the peripheral in sleep mode */
|
||||
void Chip_PMU_Sleep(LPC_PMU_T *pPMU, CHIP_PMU_MCUPOWER_T SleepMode)
|
||||
{
|
||||
if (SleepMode == PMU_MCU_DEEP_SLEEP) {
|
||||
Chip_PMU_DeepSleepState(pPMU);
|
||||
}
|
||||
else if (SleepMode == PMU_MCU_POWER_DOWN) {
|
||||
Chip_PMU_PowerDownState(pPMU);
|
||||
}
|
||||
else if (SleepMode == PMU_MCU_DEEP_PWRDOWN) {
|
||||
Chip_PMU_DeepPowerDownState(pPMU);
|
||||
}
|
||||
else {
|
||||
/* PMU_MCU_SLEEP */
|
||||
Chip_PMU_SleepState(pPMU);
|
||||
}
|
||||
}
|
||||
167
lpc_chip_15xx/src/ring_buffer.c
Normal file
167
lpc_chip_15xx/src/ring_buffer.c
Normal file
@@ -0,0 +1,167 @@
|
||||
/*
|
||||
* @brief Common ring buffer support functions
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2012
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include "ring_buffer.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
#define RB_INDH(rb) ((rb)->head & ((rb)->count - 1))
|
||||
#define RB_INDT(rb) ((rb)->tail & ((rb)->count - 1))
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize ring buffer */
|
||||
int RingBuffer_Init(RINGBUFF_T *RingBuff, void *buffer, int itemSize, int count)
|
||||
{
|
||||
RingBuff->data = buffer;
|
||||
RingBuff->count = count;
|
||||
RingBuff->itemSz = itemSize;
|
||||
RingBuff->head = RingBuff->tail = 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Insert a single item into Ring Buffer */
|
||||
int RingBuffer_Insert(RINGBUFF_T *RingBuff, const void *data)
|
||||
{
|
||||
uint8_t *ptr = RingBuff->data;
|
||||
|
||||
/* We cannot insert when queue is full */
|
||||
if (RingBuffer_IsFull(RingBuff))
|
||||
return 0;
|
||||
|
||||
ptr += RB_INDH(RingBuff) * RingBuff->itemSz;
|
||||
memcpy(ptr, data, RingBuff->itemSz);
|
||||
RingBuff->head++;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Insert multiple items into Ring Buffer */
|
||||
int RingBuffer_InsertMult(RINGBUFF_T *RingBuff, const void *data, int num)
|
||||
{
|
||||
uint8_t *ptr = RingBuff->data;
|
||||
int cnt1, cnt2;
|
||||
|
||||
/* We cannot insert when queue is full */
|
||||
if (RingBuffer_IsFull(RingBuff))
|
||||
return 0;
|
||||
|
||||
/* Calculate the segment lengths */
|
||||
cnt1 = cnt2 = RingBuffer_GetFree(RingBuff);
|
||||
if (RB_INDH(RingBuff) + cnt1 >= RingBuff->count)
|
||||
cnt1 = RingBuff->count - RB_INDH(RingBuff);
|
||||
cnt2 -= cnt1;
|
||||
|
||||
cnt1 = MIN(cnt1, num);
|
||||
num -= cnt1;
|
||||
|
||||
cnt2 = MIN(cnt2, num);
|
||||
num -= cnt2;
|
||||
|
||||
/* Write segment 1 */
|
||||
ptr += RB_INDH(RingBuff) * RingBuff->itemSz;
|
||||
memcpy(ptr, data, cnt1 * RingBuff->itemSz);
|
||||
RingBuff->head += cnt1;
|
||||
|
||||
/* Write segment 2 */
|
||||
ptr = (uint8_t *) RingBuff->data + RB_INDH(RingBuff) * RingBuff->itemSz;
|
||||
data = (const uint8_t *) data + cnt1 * RingBuff->itemSz;
|
||||
memcpy(ptr, data, cnt2 * RingBuff->itemSz);
|
||||
RingBuff->head += cnt2;
|
||||
|
||||
return cnt1 + cnt2;
|
||||
}
|
||||
|
||||
/* Pop single item from Ring Buffer */
|
||||
int RingBuffer_Pop(RINGBUFF_T *RingBuff, void *data)
|
||||
{
|
||||
uint8_t *ptr = RingBuff->data;
|
||||
|
||||
/* We cannot pop when queue is empty */
|
||||
if (RingBuffer_IsEmpty(RingBuff))
|
||||
return 0;
|
||||
|
||||
ptr += RB_INDT(RingBuff) * RingBuff->itemSz;
|
||||
memcpy(data, ptr, RingBuff->itemSz);
|
||||
RingBuff->tail++;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Pop multiple items from Ring buffer */
|
||||
int RingBuffer_PopMult(RINGBUFF_T *RingBuff, void *data, int num)
|
||||
{
|
||||
uint8_t *ptr = RingBuff->data;
|
||||
int cnt1, cnt2;
|
||||
|
||||
/* We cannot insert when queue is empty */
|
||||
if (RingBuffer_IsEmpty(RingBuff))
|
||||
return 0;
|
||||
|
||||
/* Calculate the segment lengths */
|
||||
cnt1 = cnt2 = RingBuffer_GetCount(RingBuff);
|
||||
if (RB_INDT(RingBuff) + cnt1 >= RingBuff->count)
|
||||
cnt1 = RingBuff->count - RB_INDT(RingBuff);
|
||||
cnt2 -= cnt1;
|
||||
|
||||
cnt1 = MIN(cnt1, num);
|
||||
num -= cnt1;
|
||||
|
||||
cnt2 = MIN(cnt2, num);
|
||||
num -= cnt2;
|
||||
|
||||
/* Write segment 1 */
|
||||
ptr += RB_INDT(RingBuff) * RingBuff->itemSz;
|
||||
memcpy(data, ptr, cnt1 * RingBuff->itemSz);
|
||||
RingBuff->tail += cnt1;
|
||||
|
||||
/* Write segment 2 */
|
||||
ptr = (uint8_t *) RingBuff->data + RB_INDT(RingBuff) * RingBuff->itemSz;
|
||||
data = (uint8_t *) data + cnt1 * RingBuff->itemSz;
|
||||
memcpy(data, ptr, cnt2 * RingBuff->itemSz);
|
||||
RingBuff->tail += cnt2;
|
||||
|
||||
return cnt1 + cnt2;
|
||||
}
|
||||
152
lpc_chip_15xx/src/ritimer_15xx.c
Normal file
152
lpc_chip_15xx/src/ritimer_15xx.c
Normal file
@@ -0,0 +1,152 @@
|
||||
/*
|
||||
* @brief LPC15xx RITimer driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize the RIT */
|
||||
void Chip_RIT_Init(LPC_RITIMER_T *pRITimer)
|
||||
{
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RIT);
|
||||
Chip_SYSCTL_PeriphReset(RESET_RIT);
|
||||
pRITimer->CTRL = 0x04;
|
||||
}
|
||||
|
||||
/* DeInitialize the RIT */
|
||||
void Chip_RIT_DeInit(LPC_RITIMER_T *pRITimer)
|
||||
{
|
||||
pRITimer->CTRL = 0x00;
|
||||
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_RIT);
|
||||
}
|
||||
|
||||
/* Safely sets CTRL register bits */
|
||||
void Chip_RIT_SetCTRL(LPC_RITIMER_T *pRITimer, uint32_t val)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
reg = pRITimer->CTRL & 0xF;
|
||||
pRITimer->CTRL = reg | val;
|
||||
}
|
||||
|
||||
/* Safely clears CTRL register bits */
|
||||
void Chip_RIT_ClearCTRL(LPC_RITIMER_T *pRITimer, uint32_t val)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
reg = pRITimer->CTRL & 0xF;
|
||||
pRITimer->CTRL = reg & ~val;
|
||||
}
|
||||
|
||||
/* Set a tick value for the interrupt to time out */
|
||||
void Chip_RIT_SetCompareValue(LPC_RITIMER_T *pRITimer, uint64_t val)
|
||||
{
|
||||
pRITimer->COMPVAL = (uint32_t) val;
|
||||
pRITimer->COMPVAL_H = (uint32_t) (val >> 32);
|
||||
}
|
||||
|
||||
/* Returns the current timer compare value */
|
||||
uint64_t Chip_RIT_GetCompareValue(LPC_RITIMER_T *pRITimer)
|
||||
{
|
||||
uint64_t val;
|
||||
|
||||
val = (uint64_t) pRITimer->COMPVAL_H;
|
||||
val = val << 32;
|
||||
val |= (uint64_t) pRITimer->COMPVAL;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/* Sets a mask value used for bit based compare */
|
||||
void Chip_RIT_SetMaskValue(LPC_RITIMER_T *pRITimer, uint64_t mask)
|
||||
{
|
||||
pRITimer->MASK = (uint32_t) mask;
|
||||
pRITimer->MASK_H = (uint32_t) (mask >> 32);
|
||||
}
|
||||
|
||||
/* Returns the mask value used for bit based compare */
|
||||
uint64_t Chip_RIT_GetMaskValue(LPC_RITIMER_T *pRITimer)
|
||||
{
|
||||
uint64_t val;
|
||||
|
||||
val = (uint64_t) pRITimer->MASK_H;
|
||||
val = val << 32;
|
||||
val |= (uint64_t) pRITimer->MASK;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/* Sets the current timer Counter value */
|
||||
void Chip_RIT_SetCounter(LPC_RITIMER_T *pRITimer, uint64_t count)
|
||||
{
|
||||
pRITimer->COUNTER = (uint32_t) count;
|
||||
pRITimer->COUNTER_H = (uint32_t) (count >> 32);
|
||||
}
|
||||
|
||||
/* Returns the current timer Counter value */
|
||||
uint64_t Chip_RIT_GetCounter(LPC_RITIMER_T *pRITimer)
|
||||
{
|
||||
uint64_t val;
|
||||
|
||||
val = (uint64_t) pRITimer->COUNTER_H;
|
||||
val = val << 32;
|
||||
val |= (uint64_t) pRITimer->COUNTER;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/* Set timer interval value in Hz (frequency) */
|
||||
void Chip_RIT_SetTimerIntervalHz(LPC_RITIMER_T *pRITimer, uint32_t freq)
|
||||
{
|
||||
uint64_t cmp_value;
|
||||
|
||||
/* Determine approximate compare value based on clock rate and passed interval */
|
||||
cmp_value = (uint64_t) Chip_Clock_GetSystemClockRate();
|
||||
cmp_value = cmp_value / (uint64_t) freq;
|
||||
|
||||
/* Set timer compare value and periodic mode */
|
||||
Chip_RIT_SetCompareValue(pRITimer, cmp_value);
|
||||
Chip_RIT_EnableCompClear(pRITimer);
|
||||
}
|
||||
48
lpc_chip_15xx/src/rtc_15xx.c
Normal file
48
lpc_chip_15xx/src/rtc_15xx.c
Normal file
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* @brief LPC15xx RTC chip driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
85
lpc_chip_15xx/src/sct_15xx.c
Normal file
85
lpc_chip_15xx/src/sct_15xx.c
Normal file
@@ -0,0 +1,85 @@
|
||||
/*
|
||||
* @brief LPC15xx State Configurable Timer driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize SCT */
|
||||
void Chip_SCT_Init(LPC_SCT_T *pSCT)
|
||||
{
|
||||
uint32_t index = (uint32_t) pSCT;
|
||||
index = ((index >> 14) & 0xF) - 6;
|
||||
Chip_Clock_EnablePeriphClock((CHIP_SYSCTL_CLOCK_T)(SYSCTL_CLOCK_SCT0 + index));
|
||||
Chip_SYSCTL_PeriphReset((CHIP_SYSCTL_PERIPH_RESET_T)(RESET_SCT0 + index));
|
||||
}
|
||||
|
||||
/* Shutdown SCT */
|
||||
void Chip_SCT_DeInit(LPC_SCT_T *pSCT)
|
||||
{
|
||||
uint32_t index = (uint32_t) pSCT;
|
||||
index = ((index >> 14) & 0xF) - 6;
|
||||
Chip_Clock_DisablePeriphClock((CHIP_SYSCTL_CLOCK_T)(SYSCTL_CLOCK_SCT0 + index));
|
||||
}
|
||||
|
||||
/* Set/Clear SCT control register */
|
||||
void Chip_SCT_SetClrControl(LPC_SCT_T *pSCT, uint32_t value, FunctionalState ena)
|
||||
{
|
||||
if (ena == ENABLE) {
|
||||
Chip_SCT_SetControl(pSCT, value);
|
||||
}
|
||||
else {
|
||||
Chip_SCT_ClearControl(pSCT, value);
|
||||
}
|
||||
}
|
||||
|
||||
/* Set Conflict resolution */
|
||||
void Chip_SCT_SetConflictResolution(LPC_SCT_T *pSCT, uint8_t outnum, uint8_t value)
|
||||
{
|
||||
uint32_t tem;
|
||||
|
||||
tem = pSCT->RES & (~(0x03 << (2 * outnum)));
|
||||
pSCT->RES = tem | (value << (2 * outnum));
|
||||
}
|
||||
85
lpc_chip_15xx/src/sct_pwm_15xx.c
Normal file
85
lpc_chip_15xx/src/sct_pwm_15xx.c
Normal file
@@ -0,0 +1,85 @@
|
||||
/*
|
||||
* @brief LPC15xx State Configurable Timer PWM driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Setup the OUTPUT pin corresponding to the PWM index */
|
||||
void Chip_SCTPWM_SetOutPin(LPC_SCT_T *pSCT, uint8_t index, uint8_t pin)
|
||||
{
|
||||
int ix = (int) index;
|
||||
pSCT->EVENT[ix].CTRL = index | (1 << 12);
|
||||
pSCT->EVENT[ix].STATE = 1;
|
||||
pSCT->OUT[pin].SET = 1;
|
||||
pSCT->OUT[pin].CLR = 1 << ix;
|
||||
|
||||
/* Clear the output in-case of conflict */
|
||||
pSCT->RES = (pSCT->RES & ~(3 << (pin << 1))) | (0x01 << (pin << 1));
|
||||
|
||||
/* Set and Clear do not depend on direction */
|
||||
pSCT->OUTPUTDIRCTRL = (pSCT->OUTPUTDIRCTRL & ~(3 << (pin << 1)));
|
||||
}
|
||||
|
||||
/* Set the PWM frequency */
|
||||
void Chip_SCTPWM_SetRate(LPC_SCT_T *pSCT, uint32_t freq)
|
||||
{
|
||||
uint32_t rate;
|
||||
|
||||
rate = Chip_Clock_GetSystemClockRate() / freq;;
|
||||
|
||||
/* Stop the SCT before configuration */
|
||||
Chip_SCTPWM_Stop(pSCT);
|
||||
|
||||
/* Set MATCH0 for max limit */
|
||||
pSCT->REGMODE = 0;
|
||||
Chip_SCT_SetMatchCount(pSCT, SCT_MATCH_0, 0);
|
||||
Chip_SCT_SetMatchReload(pSCT, SCT_MATCH_0, rate);
|
||||
pSCT->EVENT[0].CTRL = 1 << 12;
|
||||
pSCT->EVENT[0].STATE = 1;
|
||||
|
||||
/* Set SCT Counter to count 32-bits and reset to 0 after reaching MATCH0 */
|
||||
Chip_SCT_Config(pSCT, SCT_CONFIG_32BIT_COUNTER | SCT_CONFIG_AUTOLIMIT_L);
|
||||
}
|
||||
63
lpc_chip_15xx/src/sctipu_15xx.c
Normal file
63
lpc_chip_15xx/src/sctipu_15xx.c
Normal file
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* @brief LPC15xx SCTIPU driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Sets up an configuration and input source for a SCTIPU output channel */
|
||||
void Chip_SCTIPU_ConfigSample(uint8_t ch, uint8_t useb, uint8_t sampIn, uint8_t useLatch)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
/* Get current sample control register states and mask off channel
|
||||
specific bits. Set reserved bits states to 0. */
|
||||
reg = LPC_SCTIPU->SAMPLE_CTRL & ~(SCTIPU_CTRL_INSELMASK(ch) |
|
||||
SCTIPU_CTRL_SAMPENDMASK(ch) | SCTIPU_CTRL_LATCHENMASK(ch) |
|
||||
SCTIPU_RESERVED_BITS);
|
||||
|
||||
/* Setup channel specific configuration */
|
||||
reg |= SCTIPU_CTRL_INSEL(ch, useb) | SCTIPU_CTRL_SAMPENDSEL(ch, sampIn) |
|
||||
SCTIPU_CTRL_LATCHENSEL(ch, useLatch);
|
||||
LPC_SCTIPU->SAMPLE_CTRL = reg;
|
||||
}
|
||||
307
lpc_chip_15xx/src/spi_15xx.c
Normal file
307
lpc_chip_15xx/src/spi_15xx.c
Normal file
@@ -0,0 +1,307 @@
|
||||
/*
|
||||
* @brief LPC15xx SPI driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2014
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
STATIC void SPI_Send_Data_RxIgnore(LPC_SPI_T *pSPI,
|
||||
SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
if (pXfSetup->TxCnt == (pXfSetup->Length - 1)) {
|
||||
Chip_SPI_SendLastFrame_RxIgnore(pSPI, pXfSetup->pTx[pXfSetup->TxCnt], pXfSetup->DataSize, pXfSetup->ssel);
|
||||
}
|
||||
else {
|
||||
Chip_SPI_SendMidFrame(pSPI, pXfSetup->pTx[pXfSetup->TxCnt]);
|
||||
}
|
||||
|
||||
pXfSetup->TxCnt++;
|
||||
}
|
||||
|
||||
STATIC void SPI_Send_Data(LPC_SPI_T *pSPI,
|
||||
SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
if (pXfSetup->TxCnt == (pXfSetup->Length - 1)) {
|
||||
Chip_SPI_SendLastFrame(pSPI, pXfSetup->pTx[pXfSetup->TxCnt], pXfSetup->DataSize, pXfSetup->ssel);
|
||||
}
|
||||
else {
|
||||
Chip_SPI_SendMidFrame(pSPI, pXfSetup->pTx[pXfSetup->TxCnt]);
|
||||
}
|
||||
|
||||
pXfSetup->TxCnt++;
|
||||
}
|
||||
|
||||
STATIC void SPI_Send_Dummy(LPC_SPI_T *pSPI,
|
||||
SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
if (pXfSetup->RxCnt == (pXfSetup->Length - 1)) {
|
||||
Chip_SPI_SendLastFrame(pSPI, 0x55, pXfSetup->DataSize, pXfSetup->ssel);
|
||||
}
|
||||
else {
|
||||
Chip_SPI_SendMidFrame(pSPI, 0x55);
|
||||
}
|
||||
}
|
||||
|
||||
STATIC void SPI_Receive_Data(LPC_SPI_T *pSPI,
|
||||
SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
pXfSetup->pRx[pXfSetup->RxCnt] = Chip_SPI_ReceiveFrame(pSPI);
|
||||
pXfSetup->RxCnt++;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Calculate the Clock Rate Divider for SPI Peripheral */
|
||||
uint32_t Chip_SPI_CalClkRateDivider(LPC_SPI_T *pSPI, uint32_t bitRate)
|
||||
{
|
||||
uint32_t SPIClk;
|
||||
uint32_t DivVal;
|
||||
|
||||
/* Get SPI clock rate */
|
||||
SPIClk = Chip_Clock_GetSystemClockRate(); /*The peripheral clock for both SPIs is the system clock*/
|
||||
|
||||
DivVal = SPIClk / bitRate;
|
||||
|
||||
return DivVal - 1;
|
||||
}
|
||||
|
||||
/* Set SPI Config register */
|
||||
void Chip_SPI_SetConfig(LPC_SPI_T *pSPI, SPI_CFG_T *pConfig)
|
||||
{
|
||||
uint32_t EnStat = pSPI->CFG & SPI_CFG_SPI_EN;
|
||||
|
||||
/* Disable before update CFG register */
|
||||
if (EnStat) {
|
||||
Chip_SPI_Disable(pSPI);
|
||||
}
|
||||
|
||||
/* SPI Configure */
|
||||
pSPI->CFG = ((uint32_t) pConfig->ClockMode) | ((uint32_t) pConfig->DataOrder) | ((uint32_t) pConfig->Mode) |
|
||||
((uint32_t) pConfig->SSELPol);
|
||||
|
||||
/* Rate Divider setting */
|
||||
pSPI->DIV = SPI_DIV_VAL(pConfig->ClkDiv);
|
||||
|
||||
/* Clear status flag*/
|
||||
Chip_SPI_ClearStatus(
|
||||
pSPI,
|
||||
SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD |
|
||||
SPI_STAT_FORCE_EOT);
|
||||
|
||||
/* Return the previous state */
|
||||
if (EnStat) {
|
||||
Chip_SPI_Enable(pSPI);
|
||||
}
|
||||
}
|
||||
|
||||
void Chip_SPI_Init(LPC_SPI_T *pSPI)
|
||||
{
|
||||
if (pSPI == LPC_SPI1) {
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SPI1);
|
||||
Chip_SYSCTL_PeriphReset(RESET_SPI1);
|
||||
}
|
||||
else {
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SPI0);
|
||||
Chip_SYSCTL_PeriphReset(RESET_SPI0);
|
||||
}
|
||||
}
|
||||
|
||||
/* De-initializes the SPI peripheral */
|
||||
void Chip_SPI_DeInit(LPC_SPI_T *pSPI)
|
||||
{
|
||||
Chip_SPI_Disable(pSPI);
|
||||
|
||||
Chip_Clock_DisablePeriphClock((pSPI == LPC_SPI1) ? SYSCTL_CLOCK_SPI1 : SYSCTL_CLOCK_SPI0);
|
||||
}
|
||||
|
||||
/* Configure SPI Delay parameters */
|
||||
void Chip_SPI_DelayConfig(LPC_SPI_T *pSPI, SPI_DELAY_CONFIG_T *pConfig)
|
||||
{
|
||||
pSPI->DLY = SPI_DLY_PRE_DELAY(pConfig->PreDelay);
|
||||
pSPI->DLY |= SPI_DLY_POST_DELAY(pConfig->PostDelay);
|
||||
pSPI->DLY |= SPI_DLY_FRAME_DELAY(pConfig->FrameDelay);
|
||||
if (pConfig->TransferDelay) {
|
||||
pSPI->DLY |= SPI_DLY_TRANSFER_DELAY(pConfig->TransferDelay - 1);
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable/Enable Interrupt */
|
||||
void Chip_SPI_Int_Cmd(LPC_SPI_T *pSPI, uint32_t IntMask, FunctionalState NewState)
|
||||
{
|
||||
if (NewState == ENABLE) {
|
||||
pSPI->INTENSET |= (IntMask & SPI_INTENSET_BITMASK);
|
||||
}
|
||||
else {
|
||||
pSPI->INTENCLR = (IntMask & SPI_INTENCLR_BITMASK);
|
||||
}
|
||||
}
|
||||
|
||||
/*Send and Receive SPI Data */
|
||||
uint32_t Chip_SPI_RWFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
uint32_t Status;
|
||||
/* Clear status */
|
||||
Chip_SPI_ClearStatus(
|
||||
pSPI,
|
||||
SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD |
|
||||
SPI_STAT_FORCE_EOT);
|
||||
Chip_SPI_SetControlInfo(pSPI, pXfSetup->DataSize, pXfSetup->ssel | SPI_TXCTL_EOF);
|
||||
pXfSetup->TxCnt = pXfSetup->RxCnt = 0;
|
||||
while ((pXfSetup->TxCnt < pXfSetup->Length) ||
|
||||
(pXfSetup->RxCnt < pXfSetup->Length)) {
|
||||
Status = Chip_SPI_GetStatus(pSPI);
|
||||
|
||||
/* In case of TxReady */
|
||||
if ((Status & SPI_STAT_TXRDY) && (pXfSetup->TxCnt < pXfSetup->Length)) {
|
||||
SPI_Send_Data(pSPI, pXfSetup);
|
||||
}
|
||||
|
||||
/*In case of Rx ready */
|
||||
if ((Status & SPI_STAT_RXRDY) && (pXfSetup->RxCnt < pXfSetup->Length)) {
|
||||
SPI_Receive_Data(pSPI, pXfSetup);
|
||||
}
|
||||
}
|
||||
/* Check error */
|
||||
if (Chip_SPI_GetStatus(pSPI) & (SPI_STAT_RXOV | SPI_STAT_TXUR)) {
|
||||
return 0;
|
||||
}
|
||||
return pXfSetup->TxCnt;
|
||||
}
|
||||
|
||||
uint32_t Chip_SPI_WriteFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
/* Clear status */
|
||||
Chip_SPI_ClearStatus(
|
||||
pSPI,
|
||||
SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD |
|
||||
SPI_STAT_FORCE_EOT);
|
||||
Chip_SPI_SetControlInfo(pSPI, pXfSetup->DataSize, pXfSetup->ssel | SPI_TXCTL_EOF | SPI_TXCTL_RXIGNORE);
|
||||
pXfSetup->TxCnt = pXfSetup->RxCnt = 0;
|
||||
while (pXfSetup->TxCnt < pXfSetup->Length) {
|
||||
/* Wait for TxReady */
|
||||
while (!(Chip_SPI_GetStatus(pSPI) & SPI_STAT_TXRDY)) {}
|
||||
|
||||
SPI_Send_Data_RxIgnore(pSPI, pXfSetup);
|
||||
|
||||
}
|
||||
|
||||
/* Make sure the last frame sent completely*/
|
||||
while (!(Chip_SPI_GetStatus(pSPI) & SPI_STAT_SSD)) {}
|
||||
Chip_SPI_ClearStatus(pSPI, SPI_STAT_CLR_SSD);
|
||||
|
||||
/* Check overrun error */
|
||||
if (Chip_SPI_GetStatus(pSPI) & SPI_STAT_TXUR) {
|
||||
return 0;
|
||||
}
|
||||
return pXfSetup->TxCnt;
|
||||
}
|
||||
|
||||
uint32_t Chip_SPI_ReadFrames_Blocking(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
/* Clear status */
|
||||
Chip_SPI_ClearStatus(
|
||||
pSPI,
|
||||
SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD |
|
||||
SPI_STAT_FORCE_EOT);
|
||||
Chip_SPI_SetControlInfo(pSPI, pXfSetup->DataSize, pXfSetup->ssel | SPI_TXCTL_EOF);
|
||||
pXfSetup->TxCnt = pXfSetup->RxCnt = 0;
|
||||
while (pXfSetup->RxCnt < pXfSetup->Length) {
|
||||
/* Wait for TxReady */
|
||||
while (!(Chip_SPI_GetStatus(pSPI) & SPI_STAT_TXRDY)) {}
|
||||
|
||||
SPI_Send_Dummy(pSPI, pXfSetup);
|
||||
|
||||
/* Wait for receive data */
|
||||
while (!(Chip_SPI_GetStatus(pSPI) & SPI_STAT_RXRDY)) {}
|
||||
|
||||
SPI_Receive_Data(pSPI, pXfSetup);
|
||||
|
||||
}
|
||||
/* Check overrun error */
|
||||
if (Chip_SPI_GetStatus(pSPI) & (SPI_STAT_RXOV | SPI_STAT_TXUR)) {
|
||||
return 0;
|
||||
}
|
||||
return pXfSetup->RxCnt;
|
||||
}
|
||||
|
||||
/* SPI Interrupt Read/Write with 8-bit frame width */
|
||||
Status Chip_SPI_Int_RWFrames(LPC_SPI_T *pSPI, SPI_DATA_SETUP_T *pXfSetup)
|
||||
{
|
||||
uint32_t Status;
|
||||
|
||||
Status = Chip_SPI_GetStatus(pSPI);
|
||||
/* Check error in STAT register */
|
||||
if (Status & (SPI_STAT_RXOV | SPI_STAT_TXUR)) {
|
||||
/* Clear errors */
|
||||
Chip_SPI_ClearStatus(pSPI, SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
if (pXfSetup->TxCnt == 0) {
|
||||
if (pXfSetup->pRx == NULL) {
|
||||
Chip_SPI_SetControlInfo(pSPI, pXfSetup->DataSize, pXfSetup->ssel | SPI_TXCTL_EOF | SPI_TXCTL_RXIGNORE);
|
||||
}
|
||||
else {
|
||||
Chip_SPI_SetControlInfo(pSPI, pXfSetup->DataSize, pXfSetup->ssel | SPI_TXCTL_EOF);
|
||||
}
|
||||
}
|
||||
|
||||
if (pXfSetup->pRx == NULL) {
|
||||
if ((Status & SPI_STAT_TXRDY) && (pXfSetup->TxCnt < pXfSetup->Length)) {
|
||||
SPI_Send_Data_RxIgnore(pSPI, pXfSetup);
|
||||
}
|
||||
}
|
||||
else {
|
||||
/* check if Tx ready */
|
||||
if ((Status & SPI_STAT_TXRDY) && (pXfSetup->TxCnt < pXfSetup->Length)) {
|
||||
SPI_Send_Data(pSPI, pXfSetup);
|
||||
}
|
||||
|
||||
/* check if RX FIFO contains data */
|
||||
if ((Status & SPI_STAT_RXRDY) && (pXfSetup->RxCnt < pXfSetup->Length)) {
|
||||
SPI_Receive_Data(pSPI, pXfSetup);
|
||||
}
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
106
lpc_chip_15xx/src/stopwatch_15xx.c
Normal file
106
lpc_chip_15xx/src/stopwatch_15xx.c
Normal file
@@ -0,0 +1,106 @@
|
||||
/*
|
||||
* @brief LPC15xx specific stopwatch implementation
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
#include "stopwatch.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/* Precompute these to optimize runtime */
|
||||
static uint32_t ticksPerSecond;
|
||||
static uint32_t ticksPerMs;
|
||||
static uint32_t ticksPerUs;
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize stopwatch */
|
||||
void StopWatch_Init(void)
|
||||
{
|
||||
/* Use Repetitive Interrupt Timer (RIT) */
|
||||
Chip_RIT_Init(LPC_RITIMER);
|
||||
Chip_RIT_SetCompareValue(LPC_RITIMER, (uint32_t) 0xFFFFFFFF);
|
||||
Chip_RIT_EnableCompClear(LPC_RITIMER);
|
||||
Chip_RIT_Enable(LPC_RITIMER);
|
||||
|
||||
/* Pre-compute tick rate. */
|
||||
ticksPerSecond = Chip_Clock_GetSystemClockRate();
|
||||
ticksPerMs = ticksPerSecond / 1000;
|
||||
ticksPerUs = ticksPerSecond / 1000000;
|
||||
}
|
||||
|
||||
/* Start a stopwatch */
|
||||
uint32_t StopWatch_Start(void)
|
||||
{
|
||||
/* Return the current timer count. */
|
||||
return (uint32_t) Chip_RIT_GetCounter(LPC_RITIMER);
|
||||
}
|
||||
|
||||
/* Returns number of ticks per second of the stopwatch timer */
|
||||
uint32_t StopWatch_TicksPerSecond(void)
|
||||
{
|
||||
return ticksPerSecond;
|
||||
}
|
||||
|
||||
/* Converts from stopwatch ticks to mS. */
|
||||
uint32_t StopWatch_TicksToMs(uint32_t ticks)
|
||||
{
|
||||
return ticks / ticksPerMs;
|
||||
}
|
||||
|
||||
/* Converts from stopwatch ticks to uS. */
|
||||
uint32_t StopWatch_TicksToUs(uint32_t ticks)
|
||||
{
|
||||
return ticks / ticksPerUs;
|
||||
}
|
||||
|
||||
/* Converts from mS to stopwatch ticks. */
|
||||
uint32_t StopWatch_MsToTicks(uint32_t mS)
|
||||
{
|
||||
return mS * ticksPerMs;
|
||||
}
|
||||
|
||||
/* Converts from uS to stopwatch ticks. */
|
||||
uint32_t StopWatch_UsToTicks(uint32_t uS)
|
||||
{
|
||||
return uS * ticksPerUs;
|
||||
}
|
||||
107
lpc_chip_15xx/src/swm_15xx.c
Normal file
107
lpc_chip_15xx/src/swm_15xx.c
Normal file
@@ -0,0 +1,107 @@
|
||||
/*
|
||||
* @brief LPC15xx Switch Matrix driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licenser disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
#define PINASSIGN_IDX(movable) (((movable) >> 4))
|
||||
#define PINSHIFT(movable) (8 * ((movable) & (0xF)))
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Assign movable pin function to physical pin in Switch Matrix */
|
||||
void Chip_SWM_MovablePinAssign(CHIP_SWM_PIN_MOVABLE_T movable, uint8_t pin)
|
||||
{
|
||||
uint32_t temp;
|
||||
int pinshift = PINSHIFT(movable), regIndex = PINASSIGN_IDX(movable);
|
||||
|
||||
temp = LPC_SWM->PINASSIGN[regIndex] & (~(0xFF << pinshift));
|
||||
LPC_SWM->PINASSIGN[regIndex] = temp | (pin << pinshift);
|
||||
}
|
||||
|
||||
/* Enables a fixed function pin in the Switch Matrix */
|
||||
void Chip_SWM_EnableFixedPin(CHIP_SWM_PIN_FIXED_T pin)
|
||||
{
|
||||
uint32_t regOff, pinPos;
|
||||
|
||||
pinPos = ((uint32_t) pin) & 0x1F;
|
||||
regOff = ((uint32_t) pin) >> 7;
|
||||
|
||||
/* Set low to enable fixed pin */
|
||||
LPC_SWM->PINENABLE[regOff] &= ~(1 << pinPos);
|
||||
}
|
||||
|
||||
/* Disables a fixed function pin in the Switch Matrix */
|
||||
void Chip_SWM_DisableFixedPin(CHIP_SWM_PIN_FIXED_T pin)
|
||||
{
|
||||
uint32_t regOff, pinPos;
|
||||
|
||||
pinPos = ((uint32_t) pin) & 0x1F;
|
||||
regOff = ((uint32_t) pin) >> 7;
|
||||
|
||||
/* Set low to enable fixed pin */
|
||||
LPC_SWM->PINENABLE[regOff] |= (1 << pinPos);
|
||||
}
|
||||
|
||||
/* Enables or disables a fixed function pin in the Switch Matrix */
|
||||
void Chip_SWM_FixedPinEnable(CHIP_SWM_PIN_FIXED_T pin, bool enable)
|
||||
{
|
||||
if (enable) {
|
||||
Chip_SWM_EnableFixedPin(pin);
|
||||
}
|
||||
else {
|
||||
Chip_SWM_DisableFixedPin(pin);
|
||||
}
|
||||
}
|
||||
|
||||
/* Tests whether a fixed function pin is enabled or disabled in the Switch Matrix */
|
||||
bool Chip_SWM_IsFixedPinEnabled(CHIP_SWM_PIN_FIXED_T pin)
|
||||
{
|
||||
uint32_t regOff, pinPos;
|
||||
|
||||
pinPos = ((uint32_t) pin) & 0x1F;
|
||||
regOff = ((uint32_t) pin) >> 7;
|
||||
|
||||
return (bool) ((LPC_SWM->PINENABLE[regOff] & (1 << pinPos)) == 0);
|
||||
}
|
||||
121
lpc_chip_15xx/src/sysctl_15xx.c
Normal file
121
lpc_chip_15xx/src/sysctl_15xx.c
Normal file
@@ -0,0 +1,121 @@
|
||||
/*
|
||||
* @brief LPC15XX System Control functions
|
||||
*
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/* PDWAKECFG register mask */
|
||||
#define PDWAKEUPUSEMASK 0x00000000
|
||||
#define PDWAKEUPMASKTMP 0x01FFFF78
|
||||
|
||||
/* PDRUNCFG register mask */
|
||||
#define PDRUNCFGUSEMASK 0x00000000
|
||||
#define PDRUNCFGMASKTMP 0x01FFFF78
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Returns the computed value for a frequency measurement cycle */
|
||||
uint32_t Chip_SYSCTL_GetCompFreqMeas(uint32_t refClockRate)
|
||||
{
|
||||
uint32_t capval;
|
||||
uint64_t clkrate = 0;
|
||||
|
||||
/* Get raw capture value */
|
||||
capval = Chip_SYSCTL_GetRawFreqMeasCapval();
|
||||
|
||||
/* Limit CAPVAL check */
|
||||
if (capval > 2) {
|
||||
clkrate = (((uint64_t) capval - 2) * (uint64_t) refClockRate) / 0x4000;
|
||||
}
|
||||
|
||||
return (uint32_t) clkrate;
|
||||
}
|
||||
|
||||
/* De-assert reset for a peripheral */
|
||||
void Chip_SYSCTL_AssertPeriphReset(CHIP_SYSCTL_PERIPH_RESET_T periph)
|
||||
{
|
||||
if (periph >= 32) {
|
||||
LPC_SYSCTL->PRESETCTRL[1] |= (1 << ((uint32_t) periph - 32));
|
||||
}
|
||||
else {
|
||||
LPC_SYSCTL->PRESETCTRL[0] |= (1 << (uint32_t) periph);
|
||||
}
|
||||
}
|
||||
|
||||
/* Assert reset for a peripheral */
|
||||
void Chip_SYSCTL_DeassertPeriphReset(CHIP_SYSCTL_PERIPH_RESET_T periph)
|
||||
{
|
||||
if (periph >= 32) {
|
||||
LPC_SYSCTL->PRESETCTRL[1] &= ~(1 << ((uint32_t) periph - 32));
|
||||
}
|
||||
else {
|
||||
LPC_SYSCTL->PRESETCTRL[0] &= ~(1 << (uint32_t) periph);
|
||||
}
|
||||
}
|
||||
|
||||
/* Setup wakeup behaviour from deep sleep */
|
||||
void Chip_SYSCTL_SetWakeup(uint32_t wakeupmask)
|
||||
{
|
||||
/* Update new value */
|
||||
LPC_SYSCTL->PDWAKECFG = PDWAKEUPUSEMASK | (wakeupmask & PDWAKEUPMASKTMP);
|
||||
}
|
||||
|
||||
/* Power down one or more blocks or peripherals */
|
||||
void Chip_SYSCTL_PowerDown(uint32_t powerdownmask)
|
||||
{
|
||||
uint32_t pdrun;
|
||||
|
||||
pdrun = LPC_SYSCTL->PDRUNCFG & PDRUNCFGMASKTMP;
|
||||
pdrun |= (powerdownmask & PDRUNCFGMASKTMP);
|
||||
|
||||
LPC_SYSCTL->PDRUNCFG = (pdrun | PDRUNCFGUSEMASK);
|
||||
}
|
||||
|
||||
/* Power up one or more blocks or peripherals */
|
||||
void Chip_SYSCTL_PowerUp(uint32_t powerupmask)
|
||||
{
|
||||
uint32_t pdrun;
|
||||
|
||||
pdrun = LPC_SYSCTL->PDRUNCFG & PDRUNCFGMASKTMP;
|
||||
pdrun &= ~(powerupmask & PDRUNCFGMASKTMP);
|
||||
|
||||
LPC_SYSCTL->PDRUNCFG = (pdrun | PDRUNCFGUSEMASK);
|
||||
}
|
||||
134
lpc_chip_15xx/src/sysinit_15xx.c
Normal file
134
lpc_chip_15xx/src/sysinit_15xx.c
Normal file
@@ -0,0 +1,134 @@
|
||||
/*
|
||||
* @brief LPC15xx Chip specific SystemInit
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Clock and PLL initialization based on the internal oscillator */
|
||||
void Chip_SetupIrcClocking(void)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
/* Powerup main IRC (likely already powered up) */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRC_PD);
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_IRCOUT_PD);
|
||||
|
||||
/* Set system PLL input to IRC */
|
||||
Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_IRC);
|
||||
|
||||
/* Power down PLL to change the PLL divider ratio */
|
||||
Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD);
|
||||
|
||||
/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 6 = 72MHz
|
||||
MSEL = 5 (this is pre-decremented), PSEL = 1 (for P = 2)
|
||||
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 6 = 72MHz
|
||||
FCCO = FCLKOUT * 2 * P = 72MHz * 2 * 2 = 288MHz (within FCCO range) */
|
||||
Chip_Clock_SetupSystemPLL(5, 2);
|
||||
|
||||
/* Powerup system PLL */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD);
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
while (!Chip_Clock_IsSystemPLLLocked()) {}
|
||||
|
||||
/* Set system clock divider to 1 */
|
||||
Chip_Clock_SetSysClockDiv(1);
|
||||
|
||||
/* Setup FLASH access timing for 72MHz */
|
||||
Chip_FMC_SetFLASHAccess(SYSCTL_FLASHTIM_72MHZ_CPU);
|
||||
|
||||
/* Set main clock source to the system PLL. This will drive 72MHz
|
||||
for the main clock */
|
||||
Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_SYSPLLOUT);
|
||||
}
|
||||
|
||||
/* Clock and PLL initialization based on the external oscillator */
|
||||
void Chip_SetupXtalClocking(void)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
/* Powerup main oscillator */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD);
|
||||
|
||||
/* Wait 200us for OSC to be stablized, no status
|
||||
indication, dummy wait. */
|
||||
for (i = 0; i < 0x200; i++) {}
|
||||
|
||||
/* Set system PLL input to main oscillator */
|
||||
Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
|
||||
|
||||
/* Power down PLL to change the PLL divider ratio */
|
||||
Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD);
|
||||
|
||||
/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 6 = 72MHz
|
||||
MSEL = 5 (this is pre-decremented), PSEL = 1 (for P = 2)
|
||||
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 6 = 72MHz
|
||||
FCCO = FCLKOUT * 2 * P = 72MHz * 2 * 2 = 288MHz (within FCCO range) */
|
||||
Chip_Clock_SetupSystemPLL(5, 2);
|
||||
|
||||
/* Powerup system PLL */
|
||||
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD);
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
while (!Chip_Clock_IsSystemPLLLocked()) {}
|
||||
|
||||
/* Set system clock divider to 1 */
|
||||
Chip_Clock_SetSysClockDiv(1);
|
||||
|
||||
/* Setup FLASH access timing for 72MHz */
|
||||
Chip_FMC_SetFLASHAccess(SYSCTL_FLASHTIM_72MHZ_CPU);
|
||||
|
||||
/* Set main clock source to the system PLL. This will drive 72MHz
|
||||
for the main clock */
|
||||
Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_SYSPLLOUT);
|
||||
}
|
||||
|
||||
/* Set up and initialize hardware prior to call to main */
|
||||
void Chip_SystemInit(void)
|
||||
{
|
||||
/* Initial internal clocking */
|
||||
Chip_SetupIrcClocking();
|
||||
}
|
||||
241
lpc_chip_15xx/src/uart_15xx.c
Normal file
241
lpc_chip_15xx/src/uart_15xx.c
Normal file
@@ -0,0 +1,241 @@
|
||||
/*
|
||||
* @brief LPC15XX USART0 driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licenser disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Return UART clock ID from the UART register address */
|
||||
static CHIP_SYSCTL_CLOCK_T getUARTClockID(LPC_USART_T *pUART)
|
||||
{
|
||||
if (pUART == LPC_USART0) {
|
||||
return SYSCTL_CLOCK_UART0;
|
||||
}
|
||||
else if (pUART == LPC_USART1) {
|
||||
return SYSCTL_CLOCK_UART1;
|
||||
}
|
||||
|
||||
return SYSCTL_CLOCK_UART2;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize the UART peripheral */
|
||||
void Chip_UART_Init(LPC_USART_T *pUART)
|
||||
{
|
||||
/* Enable USART clock */
|
||||
Chip_Clock_EnablePeriphClock(getUARTClockID(pUART));
|
||||
|
||||
/* UART reset */
|
||||
if (pUART == LPC_USART0) {
|
||||
/* Peripheral reset control to USART0 */
|
||||
Chip_SYSCTL_PeriphReset(RESET_UART0);
|
||||
}
|
||||
else if (pUART == LPC_USART1) {
|
||||
/* Peripheral reset control to USART1 */
|
||||
Chip_SYSCTL_PeriphReset(RESET_UART1);
|
||||
}
|
||||
else {
|
||||
/* Peripheral reset control to USART2 */
|
||||
Chip_SYSCTL_PeriphReset(RESET_UART2);
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize the UART peripheral */
|
||||
void Chip_UART_DeInit(LPC_USART_T *pUART)
|
||||
{
|
||||
/* Disable USART clock */
|
||||
Chip_Clock_DisablePeriphClock(getUARTClockID(pUART));
|
||||
}
|
||||
|
||||
/* Transmit a byte array through the UART peripheral (non-blocking) */
|
||||
int Chip_UART_Send(LPC_USART_T *pUART, const void *data, int numBytes)
|
||||
{
|
||||
int sent = 0;
|
||||
uint8_t *p8 = (uint8_t *) data;
|
||||
|
||||
/* Send until the transmit FIFO is full or out of bytes */
|
||||
while ((sent < numBytes) &&
|
||||
((Chip_UART_GetStatus(pUART) & UART_STAT_TXRDY) != 0)) {
|
||||
Chip_UART_SendByte(pUART, *p8);
|
||||
p8++;
|
||||
sent++;
|
||||
}
|
||||
|
||||
return sent;
|
||||
}
|
||||
|
||||
/* Transmit a byte array through the UART peripheral (blocking) */
|
||||
int Chip_UART_SendBlocking(LPC_USART_T *pUART, const void *data, int numBytes)
|
||||
{
|
||||
int pass, sent = 0;
|
||||
uint8_t *p8 = (uint8_t *) data;
|
||||
|
||||
while (numBytes > 0) {
|
||||
pass = Chip_UART_Send(pUART, p8, numBytes);
|
||||
numBytes -= pass;
|
||||
sent += pass;
|
||||
p8 += pass;
|
||||
}
|
||||
|
||||
return sent;
|
||||
}
|
||||
|
||||
/* Read data through the UART peripheral (non-blocking) */
|
||||
int Chip_UART_Read(LPC_USART_T *pUART, void *data, int numBytes)
|
||||
{
|
||||
int readBytes = 0;
|
||||
uint8_t *p8 = (uint8_t *) data;
|
||||
|
||||
/* Send until the transmit FIFO is full or out of bytes */
|
||||
while ((readBytes < numBytes) &&
|
||||
((Chip_UART_GetStatus(pUART) & UART_STAT_RXRDY) != 0)) {
|
||||
*p8 = Chip_UART_ReadByte(pUART);
|
||||
p8++;
|
||||
readBytes++;
|
||||
}
|
||||
|
||||
return readBytes;
|
||||
}
|
||||
|
||||
/* Read data through the UART peripheral (blocking) */
|
||||
int Chip_UART_ReadBlocking(LPC_USART_T *pUART, void *data, int numBytes)
|
||||
{
|
||||
int pass, readBytes = 0;
|
||||
uint8_t *p8 = (uint8_t *) data;
|
||||
|
||||
while (readBytes < numBytes) {
|
||||
pass = Chip_UART_Read(pUART, p8, numBytes);
|
||||
numBytes -= pass;
|
||||
readBytes += pass;
|
||||
p8 += pass;
|
||||
}
|
||||
|
||||
return readBytes;
|
||||
}
|
||||
|
||||
/* Set baud rate for UART */
|
||||
void Chip_UART_SetBaud(LPC_USART_T *pUART, uint32_t baudrate)
|
||||
{
|
||||
uint32_t baudRateGenerator;
|
||||
baudRateGenerator = Chip_Clock_GetUARTBaseClockRate() / (16 * baudrate);
|
||||
pUART->BRG = baudRateGenerator - 1; /* baud rate */
|
||||
}
|
||||
|
||||
/* Set baud rate for UART using RTC32K oscillator */
|
||||
void Chip_UART_SetBaudWithRTC32K(LPC_USART_T *pUART, uint32_t baudrate)
|
||||
{
|
||||
/* Simple integer divide */
|
||||
pUART->BRG = (Chip_Clock_GetRTCOscRate() / (3 * baudrate)) - 1;
|
||||
|
||||
pUART->CFG |= UART_MODE_32K;
|
||||
}
|
||||
|
||||
/* UART receive-only interrupt handler for ring buffers */
|
||||
void Chip_UART_RXIntHandlerRB(LPC_USART_T *pUART, RINGBUFF_T *pRB)
|
||||
{
|
||||
/* New data will be ignored if data not popped in time */
|
||||
while ((Chip_UART_GetStatus(pUART) & UART_STAT_RXRDY) != 0) {
|
||||
uint8_t ch = Chip_UART_ReadByte(pUART);
|
||||
RingBuffer_Insert(pRB, &ch);
|
||||
}
|
||||
}
|
||||
|
||||
/* UART transmit-only interrupt handler for ring buffers */
|
||||
void Chip_UART_TXIntHandlerRB(LPC_USART_T *pUART, RINGBUFF_T *pRB)
|
||||
{
|
||||
uint8_t ch;
|
||||
|
||||
/* Fill FIFO until full or until TX ring buffer is empty */
|
||||
while (((Chip_UART_GetStatus(pUART) & UART_STAT_TXRDY) != 0) &&
|
||||
RingBuffer_Pop(pRB, &ch)) {
|
||||
Chip_UART_SendByte(pUART, ch);
|
||||
}
|
||||
}
|
||||
|
||||
/* Populate a transmit ring buffer and start UART transmit */
|
||||
uint32_t Chip_UART_SendRB(LPC_USART_T *pUART, RINGBUFF_T *pRB, const void *data, int count)
|
||||
{
|
||||
uint32_t ret;
|
||||
uint8_t *p8 = (uint8_t *) data;
|
||||
|
||||
/* Don't let UART transmit ring buffer change in the UART IRQ handler */
|
||||
Chip_UART_IntDisable(pUART, UART_INTEN_TXRDY);
|
||||
|
||||
/* Move as much data as possible into transmit ring buffer */
|
||||
ret = RingBuffer_InsertMult(pRB, p8, count);
|
||||
Chip_UART_TXIntHandlerRB(pUART, pRB);
|
||||
|
||||
/* Add additional data to transmit ring buffer if possible */
|
||||
ret += RingBuffer_InsertMult(pRB, (p8 + ret), (count - ret));
|
||||
|
||||
/* Enable UART transmit interrupt */
|
||||
Chip_UART_IntEnable(pUART, UART_INTEN_TXRDY);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Copy data from a receive ring buffer */
|
||||
int Chip_UART_ReadRB(LPC_USART_T *pUART, RINGBUFF_T *pRB, void *data, int bytes)
|
||||
{
|
||||
(void) pUART;
|
||||
|
||||
return RingBuffer_PopMult(pRB, (uint8_t *) data, bytes);
|
||||
}
|
||||
|
||||
/* UART receive/transmit interrupt handler for ring buffers */
|
||||
void Chip_UART_IRQRBHandler(LPC_USART_T *pUART, RINGBUFF_T *pRXRB, RINGBUFF_T *pTXRB)
|
||||
{
|
||||
/* Handle transmit interrupt if enabled */
|
||||
if ((Chip_UART_GetStatus(pUART) & UART_STAT_TXRDY) != 0) {
|
||||
Chip_UART_TXIntHandlerRB(pUART, pTXRB);
|
||||
|
||||
/* Disable transmit interrupt if the ring buffer is empty */
|
||||
if (RingBuffer_IsEmpty(pTXRB)) {
|
||||
Chip_UART_IntDisable(pUART, UART_INTEN_TXRDY);
|
||||
}
|
||||
}
|
||||
|
||||
/* Handle receive interrupt */
|
||||
Chip_UART_RXIntHandlerRB(pUART, pRXRB);
|
||||
}
|
||||
72
lpc_chip_15xx/src/wwdt_15xx.c
Normal file
72
lpc_chip_15xx/src/wwdt_15xx.c
Normal file
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* @brief LPC15xx WWDT chip driver
|
||||
*
|
||||
* @note
|
||||
* Copyright(C) NXP Semiconductors, 2013
|
||||
* All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* LPC products. This software is supplied "AS IS" without any warranties of
|
||||
* any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights under any
|
||||
* patent, copyright, mask work right, or any other intellectual property rights in
|
||||
* or to any products. NXP Semiconductors reserves the right to make changes
|
||||
* in the software without notification. NXP Semiconductors also makes no
|
||||
* representation or warranty that such application will be suitable for the
|
||||
* specified use without further testing or modification.
|
||||
*
|
||||
* @par
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
*/
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/*****************************************************************************
|
||||
* Private types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public types/enumerations/variables
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Private functions
|
||||
****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Public functions
|
||||
****************************************************************************/
|
||||
|
||||
/* Initialize the Watchdog timer */
|
||||
void Chip_WWDT_Init(LPC_WWDT_T *pWWDT)
|
||||
{
|
||||
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_WDT);
|
||||
|
||||
/* Disable watchdog */
|
||||
pWWDT->MOD = 0;
|
||||
pWWDT->TC = 0xFF;
|
||||
pWWDT->WARNINT = 0x3FF;
|
||||
pWWDT->WINDOW = 0xFFFFFF;
|
||||
}
|
||||
|
||||
/* Clear WWDT interrupt status flags */
|
||||
void Chip_WWDT_ClearStatusFlag(LPC_WWDT_T *pWWDT, uint32_t status)
|
||||
{
|
||||
if (status & WWDT_WDMOD_WDTOF) {
|
||||
pWWDT->MOD &= (~WWDT_WDMOD_WDTOF) & WWDT_WDMOD_BITMASK;
|
||||
}
|
||||
|
||||
if (status & WWDT_WDMOD_WDINT) {
|
||||
pWWDT->MOD |= WWDT_WDMOD_WDINT;
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user